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author | Arnd Bergmann <arnd@arndb.de> | 2011-12-28 02:55:47 +0400 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2011-12-28 02:55:47 +0400 |
commit | e195ffbe4573f79d590e63e2ae32dac2a73d5768 (patch) | |
tree | 3dbf31c376324923c2dc90cefe462ed6b01f9070 /arch/arm/mach-tegra/clock.c | |
parent | 0782e5bb57e16428de32f0f933c77324b186193f (diff) | |
parent | e5570bbc9c06634cfac94e06ac1432b53d8595e5 (diff) | |
download | linux-e195ffbe4573f79d590e63e2ae32dac2a73d5768.tar.xz |
Merge branch 'tegra/soc' into next/soc
* tegra/soc:
arm/tegra: Compile tegra_dt_init_irq only when CONFIG_OF
arm/tegra: Make MACH_TEGRA_DT depend on ARCH_TEGRA_2x_SOC
arm/tegra: Delete tegra_init_clock()
arm/tegra: Fix section mismatch errors in tegra30 pinmux
arm/tegra: Fix section mismatch errors in tegra20 pinmux
arm/tegra: refresh defconfig for tegra30
arm/tegra: add support for tegra30 based board cardhu
arm/tegra: implement support for tegra30
arm/tegra: pinmux tables and definitions for tegra30
arm/tegra: add new fields to struct tegra_pingroup_desc
arm/tegra: prepare pinmux code for multiple tegra variants
arm/tegra: rename tegra20 pinmux files
arm/tegra: generalize L2 cache initialization
arm/tegra: use PMC reset
arm/tegra: rename board-dt.c to board-dt-tegra20.c
arm/tegra: prepare early init for multiple tegra variants
arm/tegra: don't export clk_measure_input_freq
arm/tegra: prepare clock code for multiple tegra variants
arm/tegra: cleanup tegra20 support
arm/tegra: clk_get should not be fatal
Conflicts:
arch/arm/mach-tegra/board-dt-tegra20.c
Diffstat (limited to 'arch/arm/mach-tegra/clock.c')
-rw-r--r-- | arch/arm/mach-tegra/clock.c | 25 |
1 files changed, 4 insertions, 21 deletions
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index f8d41ffc0ca9..8337068a4abe 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c @@ -387,35 +387,18 @@ EXPORT_SYMBOL(tegra_clk_init_from_table); void tegra_periph_reset_deassert(struct clk *c) { - tegra2_periph_reset_deassert(c); + BUG_ON(!c->ops->reset); + c->ops->reset(c, false); } EXPORT_SYMBOL(tegra_periph_reset_deassert); void tegra_periph_reset_assert(struct clk *c) { - tegra2_periph_reset_assert(c); + BUG_ON(!c->ops->reset); + c->ops->reset(c, true); } EXPORT_SYMBOL(tegra_periph_reset_assert); -void __init tegra_init_clock(void) -{ - tegra2_init_clocks(); -} - -/* - * The SDMMC controllers have extra bits in the clock source register that - * adjust the delay between the clock and data to compenstate for delays - * on the PCB. - */ -void tegra_sdmmc_tap_delay(struct clk *c, int delay) -{ - unsigned long flags; - - spin_lock_irqsave(&c->spinlock, flags); - tegra2_sdmmc_tap_delay(c, delay); - spin_unlock_irqrestore(&c->spinlock, flags); -} - #ifdef CONFIG_DEBUG_FS static int __clk_lock_all_spinlocks(void) |