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| author | Peter De Schrijver <pdeschrijver@nvidia.com> | 2011-10-12 15:53:04 +0400 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2011-10-14 02:04:54 +0400 |
| commit | 21fb1ccc92655d8eabed9b8fdfa2a65bf6e58a33 (patch) | |
| tree | ed67e9aaf4c35c03131ab32214f75cc2e79a0e48 /arch/arm/mach-tegra/board-seaboard-pinmux.c | |
| parent | e146245453986974a294d91d691481da8b61696b (diff) | |
| download | linux-21fb1ccc92655d8eabed9b8fdfa2a65bf6e58a33.tar.xz | |
arm/tegra: add support for ventana pinmuxing
Add support for ventana pinmuxing as a seaboard derivative. This is a cut down
version of work done by Jong Kim <jongk@nvidia.com>.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-tegra/board-seaboard-pinmux.c')
| -rw-r--r-- | arch/arm/mach-tegra/board-seaboard-pinmux.c | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c index 841e4672b520..dd3b7405b4d4 100644 --- a/arch/arm/mach-tegra/board-seaboard-pinmux.c +++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c @@ -159,6 +159,27 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = { {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, }; +static __initdata struct tegra_pingroup_config ventana_pinmux[] = { + {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_DTD, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LPW0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LPW2, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LSC1, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_LSCK, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_LSDA, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_PTA, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SLXK, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, + {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, + {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, +}; + static struct platform_device *pinmux_devices[] = { &tegra_gpio_device, &tegra_pinmux_device, @@ -173,6 +194,26 @@ static struct tegra_gpio_table common_gpio_table[] = { { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true }, }; +static void __init update_pinmux(struct tegra_pingroup_config *newtbl, int size) +{ + int i, j; + struct tegra_pingroup_config *new_pingroup, *base_pingroup; + + /* Update base seaboard pinmux table with secondary board + * specific pinmux table table. + */ + for (i = 0; i < size; i++) { + new_pingroup = &newtbl[i]; + for (j = 0; j < ARRAY_SIZE(seaboard_pinmux); j++) { + base_pingroup = &seaboard_pinmux[j]; + if (new_pingroup->pingroup == base_pingroup->pingroup) { + *base_pingroup = *new_pingroup; + break; + } + } + } +} + void __init seaboard_common_pinmux_init(void) { platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); @@ -189,3 +230,10 @@ void __init seaboard_pinmux_init(void) { seaboard_common_pinmux_init(); } + +void __init ventana_pinmux_init(void) +{ + update_pinmux(ventana_pinmux, ARRAY_SIZE(ventana_pinmux)); + seaboard_common_pinmux_init(); +} + |