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authorOlof Johansson <olof@lixom.net>2012-11-21 12:29:21 +0400
committerOlof Johansson <olof@lixom.net>2012-11-21 12:29:21 +0400
commit90919bf2149a2e988ab295d7266b1608d42f21af (patch)
tree996e257f3e9f2fd9db6fc32e1a4c8489bc9be2f9 /arch/arm/mach-tegra/board-dt-tegra20.c
parent6fe05f33da536ac60a4c4e6807f454937047de54 (diff)
parent2658ef15b27e0fb166f4b7b997b027a223cd0793 (diff)
downloadlinux-90919bf2149a2e988ab295d7266b1608d42f21af.tar.xz
Merge tag 'tegra-for-3.8-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt
From Stephen Warren: ARM: tegra: device tree changes A wide variety of device tree additions are made across many Tegra boards: * WiFi is supported on Seaboard, Ventana, and Cardhu. * An I2C mux is added for Ventana, and Tamonten. * SPI flash is added to Cardhu, and TrimSlice. * Temperature sensors are added to Harmony, Tamonten, and Ventana. * host1x (graphics/display controller) is added to the SoC include files. * HDMI displays are enabled on Harmony, TrimSlice, Tamonten, Plutux, Tec, and Whistler. This pull request is based on tegra-for-3.8-soc. * tag 'tegra-for-3.8-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (47 commits) ARM: tegra: whistler: enable HDMI port ARM: tegra: tec: Enable HDMI output ARM: tegra: plutux: Enable HDMI output ARM: tegra: tamonten: Add host1x support ARM: tegra: trimslice: enable HDMI port ARM: tegra: harmony: enable HDMI port ARM: tegra: Add Tegra30 host1x support ARM: tegra: Add Tegra20 host1x support ARM: tegra: trimslice: enable SPI flash ARM: tegra: dts: add sflash controller dt entry ARM: tegra: ventana: Add NCT1008 temperature sensor ARM: tegra: tamonten: Add NCT1008 temperature sensor ARM: tegra: harmony: Add ADT7641 temperature sensor ARM: tegra: tec: Remove redundant DT properties ARM: tegra: tamonten: Add DDC/PTA pinmux ARM: tegra: dts: cardhu: enable SLINK4 ARM: tegra: dts: add slink controller dt entry ARM: dt: tegra: ventana: define pinmux for ddc ARM: dt: t30 cardhu: set pinmux and power for wlan ARM: dt: t20 ventana: set pinmux and power for wlan ...
Diffstat (limited to 'arch/arm/mach-tegra/board-dt-tegra20.c')
-rw-r--r--arch/arm/mach-tegra/board-dt-tegra20.c27
1 files changed, 24 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c
index aa5325cd1c42..734d9cc87f2e 100644
--- a/arch/arm/mach-tegra/board-dt-tegra20.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -40,12 +40,10 @@
#include <asm/mach/time.h>
#include <asm/setup.h>
-#include <mach/iomap.h>
-#include <mach/irqs.h>
-
#include "board.h"
#include "clock.h"
#include "common.h"
+#include "iomap.h"
struct tegra_ehci_platform_data tegra_ehci1_pdata = {
.operating_mode = TEGRA_USB_OTG,
@@ -91,6 +89,17 @@ struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
&tegra_ehci3_pdata),
OF_DEV_AUXDATA("nvidia,tegra20-apbdma", TEGRA_APB_DMA_BASE, "tegra-apbdma", NULL),
OF_DEV_AUXDATA("nvidia,tegra20-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra20-sflash", 0x7000c380, "spi", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D400, "spi_tegra.0", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D600, "spi_tegra.1", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000D800, "spi_tegra.2", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra20-slink", 0x7000DA00, "spi_tegra.3", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra20-host1x", 0x50000000, "host1x", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra20-dc", 0x54200000, "tegradc.0", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra20-dc", 0x54240000, "tegradc.1", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra20-hdmi", 0x54280000, "hdmi", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra20-dsi", 0x54300000, "dsi", NULL),
+ OF_DEV_AUXDATA("nvidia,tegra20-tvo", 0x542c0000, "tvo", NULL),
{}
};
@@ -104,8 +113,20 @@ static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
{ "pll_a", "pll_p_out1", 56448000, true },
{ "pll_a_out0", "pll_a", 11289600, true },
{ "cdev1", NULL, 0, true },
+ { "blink", "clk_32k", 32768, true },
{ "i2s1", "pll_a_out0", 11289600, false},
{ "i2s2", "pll_a_out0", 11289600, false},
+ { "sdmmc1", "pll_p", 48000000, false},
+ { "sdmmc3", "pll_p", 48000000, false},
+ { "sdmmc4", "pll_p", 48000000, false},
+ { "spi", "pll_p", 20000000, false },
+ { "sbc1", "pll_p", 100000000, false },
+ { "sbc2", "pll_p", 100000000, false },
+ { "sbc3", "pll_p", 100000000, false },
+ { "sbc4", "pll_p", 100000000, false },
+ { "host1x", "pll_c", 150000000, false },
+ { "disp1", "pll_p", 600000000, false },
+ { "disp2", "pll_p", 600000000, false },
{ NULL, NULL, 0, 0},
};