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authorWei Ni <wni@nvidia.com>2012-09-21 12:54:56 +0400
committerStephen Warren <swarren@nvidia.com>2012-11-05 22:36:22 +0400
commit25804d8123e9c1657694844b10fcd7834493e41a (patch)
tree42975ed18df4d3f8119d22b0bb97779eee61b534 /arch/arm/mach-tegra/board-dt-tegra20.c
parentbb1de8877c960b3b3e1c8337730df970b262fd44 (diff)
downloadlinux-25804d8123e9c1657694844b10fcd7834493e41a.tar.xz
ARM: tegra: set up wlan clocks for tegra dt
Set up the wlan clock tree for Tegra20 and Tegra30. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/board-dt-tegra20.c')
-rw-r--r--arch/arm/mach-tegra/board-dt-tegra20.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c
index 71569c01afd2..0419056e53bd 100644
--- a/arch/arm/mach-tegra/board-dt-tegra20.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -102,8 +102,12 @@ static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
{ "pll_a", "pll_p_out1", 56448000, true },
{ "pll_a_out0", "pll_a", 11289600, true },
{ "cdev1", NULL, 0, true },
+ { "blink", "clk_32k", 32768, true },
{ "i2s1", "pll_a_out0", 11289600, false},
{ "i2s2", "pll_a_out0", 11289600, false},
+ { "sdmmc1", "pll_p", 48000000, false},
+ { "sdmmc3", "pll_p", 48000000, false},
+ { "sdmmc4", "pll_p", 48000000, false},
{ NULL, NULL, 0, 0},
};