Merge tag 'renesas-soc2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Merge "Second Round of Renesas ARM Based SoC Updates for v3.17" from Simon
Horman:

* Suspend on non-SMP update for r8a7790
* Move r8a7791.h out of mach directory.
  This is part of a multi-stage effort to move headers
  out of that directory.

* tag 'renesas-soc2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: Allow r8a7791 to build non-SMP APMU code
  ARM: shmobile: Move r8a7791 reset code to pm-r8a7791.c
  ARM: shmobile: Allow r8a7790 to build non-SMP APMU code
  ARM: shmobile: Move r8a7790 reset code to pm-r8a7790.c
  ARM: shmobile: Use __init for APMU suspend init function
  ARM: shmobile: Adjust APMU code to build for non-SMP
  ARM: shmobile: Allow use of boot code for non-SMP case
  ARM: shmobile: Move r8a7791.h

Signed-off-by: Olof Johansson <olof@lixom.net>

1 files changed, 39 insertions, 4 deletions

diff --git a/arch/arm/mach-shmobile/pm-r8a7790.c b/arch/arm/mach-shmobile/pm-r8a7790.c
index 8845433a00b3..80e8d95e54d3 100644
--- a/arch/arm/mach-shmobile/pm-r8a7790.c
+++ b/arch/arm/mach-shmobile/pm-r8a7790.c
@@ -11,12 +11,22 @@
  */
 
 #include <linux/kernel.h>
-
+#include <linux/smp.h>
 #include <asm/io.h>
-
+#include "common.h"
 #include "pm-rcar.h"
 #include "r8a7790.h"
 
+/* RST */
+#define RST		0xe6160000
+#define CA15BAR		0x0020
+#define CA7BAR		0x0030
+#define CA15RESCNT	0x0040
+#define CA7RESCNT	0x0044
+
+/* On-chip RAM */
+#define MERAM          0xe8080000
+
 /* SYSC */
 #define SYSCIER 0x0c
 #define SYSCIMR 0x10
@@ -40,8 +50,33 @@ static inline void r8a7790_sysc_init(void) {}
 
 void __init r8a7790_pm_init(void)
 {
+	void __iomem *p;
+	u32 bar;
 	static int once;
 
-	if (!once++)
-		r8a7790_sysc_init();
+	if (once++)
+		return;
+
+	/* MERAM for jump stub, because BAR requires 256KB aligned address */
+	p = ioremap_nocache(MERAM, shmobile_boot_size);
+	memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
+	iounmap(p);
+
+	/* setup reset vectors */
+	p = ioremap_nocache(RST, 0x63);
+	bar = (MERAM >> 8) & 0xfffffc00;
+	writel_relaxed(bar, p + CA15BAR);
+	writel_relaxed(bar, p + CA7BAR);
+	writel_relaxed(bar | 0x10, p + CA15BAR);
+	writel_relaxed(bar | 0x10, p + CA7BAR);
+
+	/* de-assert reset for all CPUs */
+	writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
+		       p + CA15RESCNT);
+	writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000,
+		       p + CA7RESCNT);
+	iounmap(p);
+
+	r8a7790_sysc_init();
+	shmobile_smp_apmu_suspend_init();
 }