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authorGuennadi Liakhovetski <g.liakhovetski@gmx.de>2013-03-07 23:00:48 +0400
committerSimon Horman <horms+renesas@verge.net.au>2013-04-02 06:02:15 +0400
commitfe7aa82d62d13d97c9a786707c467357cb8bddc3 (patch)
treee353234b16d45f5bc276871fe4cc9e5558c82a5a /arch/arm/mach-shmobile/clock-sh73a0.c
parent0b7d78202260162057248875b1c9bac70d041e58 (diff)
downloadlinux-fe7aa82d62d13d97c9a786707c467357cb8bddc3.tar.xz
ARM: shmobile: sh73a0: add a TWD clock
Add a TWD clock on sh73a0 for the smp_twd driver to properly update the clock's frequency upon cpufreq events. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/clock-sh73a0.c')
-rw-r--r--arch/arm/mach-shmobile/clock-sh73a0.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 34b5c5ae4cbd..a57ec151674e 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -288,6 +288,20 @@ static struct clk div4_clks[DIV4_NR] = {
[DIV4_HP] = DIV4(FRQCRB, 4, 0xdff, 0),
};
+static unsigned long twd_recalc(struct clk *clk)
+{
+ return clk_get_rate(clk->parent) / 4;
+}
+
+static struct sh_clk_ops twd_clk_ops = {
+ .recalc = twd_recalc,
+};
+
+static struct clk twd_clk = {
+ .parent = &div4_clks[DIV4_Z],
+ .ops = &twd_clk_ops,
+};
+
enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_ZB1,
DIV6_FLCTL, DIV6_SDHI0, DIV6_SDHI1, DIV6_SDHI2,
DIV6_FSIA, DIV6_FSIB, DIV6_SUB,
@@ -482,6 +496,7 @@ static struct clk dsi1phy_clk = {
static struct clk *late_main_clks[] = {
&dsi0phy_clk,
&dsi1phy_clk,
+ &twd_clk,
};
enum { MSTP001,
@@ -546,6 +561,7 @@ static struct clk mstp_clks[MSTP_NR] = {
static struct clk_lookup lookups[] = {
/* main clocks */
CLKDEV_CON_ID("r_clk", &r_clk),
+ CLKDEV_DEV_ID("smp_twd", &twd_clk), /* smp_twd */
/* DIV6 clocks */
CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),