diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-11 21:09:45 +0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-11 21:09:45 +0400 |
commit | 7cc4e87f912bbefa440a51856b8d076e5d1f554a (patch) | |
tree | 1b8df8683f3de37d2e8211ffa8d151f60d59af62 /arch/arm/mach-sa1100 | |
parent | 5ba2f67afb02c5302b2898949ed6fc3b3d37dcf1 (diff) | |
parent | 69fc7eed5f56bce15b239e5110de2575a6970df4 (diff) | |
download | linux-7cc4e87f912bbefa440a51856b8d076e5d1f554a.tar.xz |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (236 commits)
[ARM] 5300/1: fixup spitz reset during boot
[ARM] 5295/1: make ZONE_DMA optional
[ARM] 5239/1: Palm Zire 72 power management support
[ARM] 5298/1: Drop desc_handle_irq()
[ARM] 5297/1: [KS8695] Fix two compile-time warnings
[ARM] 5296/1: [KS8695] Replace macro's with trailing underscores.
[ARM] pxa: allow multi-machine PCMCIA builds
[ARM] pxa: add preliminary CPUFREQ support for PXA3xx
[ARM] pxa: add missing ACCR bit definitions to pxa3xx-regs.h
[ARM] pxa: rename cpu-pxa.c to cpufreq-pxa2xx.c
[ARM] pxa/zylonite: add support for USB OHCI
[ARM] ohci-pxa27x: use ioremap() and offset for register access
[ARM] ohci-pxa27x: introduce pxa27x_clear_otgph()
[ARM] ohci-pxa27x: use platform_get_{irq,resource} for the resource
[ARM] ohci-pxa27x: move OHCI controller specific registers into the driver
[ARM] ohci-pxa27x: introduce flags to avoid direct access to OHCI registers
[ARM] pxa: move I2S register and bit definitions into pxa2xx-i2s.c
[ARM] pxa: simplify DMA register definitions
[ARM] pxa: make additional DCSR bits valid for PXA3xx
[ARM] pxa: move i2c register and bit definitions into i2c-pxa.c
...
Fixed up conflicts in
arch/arm/mach-versatile/core.c
sound/soc/pxa/pxa2xx-ac97.c
sound/soc/pxa/pxa2xx-i2s.c
manually.
Diffstat (limited to 'arch/arm/mach-sa1100')
-rw-r--r-- | arch/arm/mach-sa1100/badge4.c | 44 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/cpu-sa1100.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/cpu-sa1110.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/generic.c | 14 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/include/mach/SA-1100.h | 16 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/include/mach/hardware.h | 18 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/include/mach/memory.h | 16 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/irq.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/neponset.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/pleb.c | 13 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/simpad.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/ssp.c | 2 |
12 files changed, 71 insertions, 76 deletions
diff --git a/arch/arm/mach-sa1100/badge4.c b/arch/arm/mach-sa1100/badge4.c index 3efefbdd2527..ab5883b39ddf 100644 --- a/arch/arm/mach-sa1100/badge4.c +++ b/arch/arm/mach-sa1100/badge4.c @@ -95,19 +95,19 @@ static int __init badge4_sa1111_init(void) * One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b) */ static struct mtd_partition badge4_partitions[] = { - { - .name = "BLOB boot loader", - .offset = 0, - .size = 0x0000A000 - }, { - .name = "params", - .offset = MTDPART_OFS_APPEND, - .size = 0x00006000 - }, { - .name = "root", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL - } + { + .name = "BLOB boot loader", + .offset = 0, + .size = 0x0000A000 + }, { + .name = "params", + .offset = MTDPART_OFS_APPEND, + .size = 0x00006000 + }, { + .name = "root", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL + } }; static struct flash_platform_data badge4_flash_data = { @@ -126,7 +126,7 @@ static int five_v_on __initdata = 0; static int __init five_v_on_setup(char *ignore) { - five_v_on = 1; + five_v_on = 1; return 1; } __setup("five_v_on", five_v_on_setup); @@ -171,15 +171,15 @@ static int __init badge4_init(void) GPCR = BADGE4_GPIO_TESTPT_J7; GPDR |= BADGE4_GPIO_TESTPT_J7; - /* 5V supply rail. */ - GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */ - GPDR |= BADGE4_GPIO_PCMEN5V; + /* 5V supply rail. */ + GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */ + GPDR |= BADGE4_GPIO_PCMEN5V; /* CPLD sdram type inputs; set up by blob */ //GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0); printk(KERN_DEBUG __FILE__ ": SDRAM CPLD typ1=%d typ0=%d\n", - !!(GPLR & BADGE4_GPIO_SDTYP1), - !!(GPLR & BADGE4_GPIO_SDTYP0)); + !!(GPLR & BADGE4_GPIO_SDTYP1), + !!(GPLR & BADGE4_GPIO_SDTYP0)); /* SA1111 reset pin; set up by blob */ //GPSR = BADGE4_GPIO_SA1111_NRST; @@ -205,8 +205,8 @@ static int __init badge4_init(void) ret = badge4_sa1111_init(); if (ret < 0) printk(KERN_ERR - "%s: SA-1111 initialization failed (%d)\n", - __func__, ret); + "%s: SA-1111 initialization failed (%d)\n", + __func__, ret); /* maybe turn on 5v0 from the start */ @@ -254,7 +254,7 @@ EXPORT_SYMBOL(badge4_set_5V); static struct map_desc badge4_io_desc[] __initdata = { - { /* SRAM bank 1 */ + { /* SRAM bank 1 */ .virtual = 0xf1000000, .pfn = __phys_to_pfn(0x08000000), .length = 0x00100000, diff --git a/arch/arm/mach-sa1100/cpu-sa1100.c b/arch/arm/mach-sa1100/cpu-sa1100.c index da3a898a6d66..f7fa03478efd 100644 --- a/arch/arm/mach-sa1100/cpu-sa1100.c +++ b/arch/arm/mach-sa1100/cpu-sa1100.c @@ -88,6 +88,8 @@ #include <linux/init.h> #include <linux/cpufreq.h> +#include <asm/cputype.h> + #include <mach/hardware.h> #include "generic.h" @@ -240,7 +242,7 @@ static struct cpufreq_driver sa1100_driver = { static int __init sa1100_dram_init(void) { - if ((processor_id & CPU_SA1100_MASK) == CPU_SA1100_ID) + if (cpu_is_sa1100()) return cpufreq_register_driver(&sa1100_driver); else return -ENODEV; diff --git a/arch/arm/mach-sa1100/cpu-sa1110.c b/arch/arm/mach-sa1100/cpu-sa1110.c index 029dbfbbafcf..3e4fb214eada 100644 --- a/arch/arm/mach-sa1100/cpu-sa1110.c +++ b/arch/arm/mach-sa1100/cpu-sa1110.c @@ -23,10 +23,11 @@ #include <linux/cpufreq.h> #include <linux/delay.h> #include <linux/init.h> +#include <linux/io.h> #include <mach/hardware.h> +#include <asm/cputype.h> #include <asm/mach-types.h> -#include <asm/io.h> #include <asm/system.h> #include "generic.h" diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c index b422526f6d8b..c1fbd5b5f9c4 100644 --- a/arch/arm/mach-sa1100/generic.c +++ b/arch/arm/mach-sa1100/generic.c @@ -42,7 +42,7 @@ EXPORT_SYMBOL(reset_status); static const unsigned short cclk_frequency_100khz[NR_FREQS] = { 590, /* 59.0 MHz */ 737, /* 73.7 MHz */ - 885, /* 88.5 MHz */ + 885, /* 88.5 MHz */ 1032, /* 103.2 MHz */ 1180, /* 118.0 MHz */ 1327, /* 132.7 MHz */ @@ -52,10 +52,10 @@ static const unsigned short cclk_frequency_100khz[NR_FREQS] = { 1917, /* 191.7 MHz */ 2064, /* 206.4 MHz */ 2212, /* 221.2 MHz */ - 2359, /* 235.9 MHz */ - 2507, /* 250.7 MHz */ - 2654, /* 265.4 MHz */ - 2802 /* 280.2 MHz */ + 2359, /* 235.9 MHz */ + 2507, /* 250.7 MHz */ + 2654, /* 265.4 MHz */ + 2802 /* 280.2 MHz */ }; #if defined(CONFIG_CPU_FREQ_SA1100) || defined(CONFIG_CPU_FREQ_SA1110) @@ -113,7 +113,7 @@ unsigned int sa11x0_getspeed(unsigned int cpu) #else /* * We still need to provide this so building without cpufreq works. - */ + */ unsigned int cpufreq_get(unsigned int cpu) { return cclk_frequency_100khz[PPCR & 0xf] * 100; @@ -389,7 +389,7 @@ EXPORT_SYMBOL(sa1100fb_lcd_power); */ static struct map_desc standard_io_desc[] __initdata = { - { /* PCM */ + { /* PCM */ .virtual = 0xf8000000, .pfn = __phys_to_pfn(0x80000000), .length = 0x00100000, diff --git a/arch/arm/mach-sa1100/include/mach/SA-1100.h b/arch/arm/mach-sa1100/include/mach/SA-1100.h index 62aaf04a3906..4f7ea012e1e5 100644 --- a/arch/arm/mach-sa1100/include/mach/SA-1100.h +++ b/arch/arm/mach-sa1100/include/mach/SA-1100.h @@ -2054,19 +2054,3 @@ /* active display mode) */ #define LCCR3_OutEnH (LCCR3_OEP*0) /* Output Enable active High */ #define LCCR3_OutEnL (LCCR3_OEP*1) /* Output Enable active Low */ - -#ifndef __ASSEMBLY__ -extern unsigned int processor_id; -#endif - -#define CPU_REVISION (processor_id & 15) -#define CPU_SA1110_A0 (0) -#define CPU_SA1110_B0 (4) -#define CPU_SA1110_B1 (5) -#define CPU_SA1110_B2 (6) -#define CPU_SA1110_B4 (8) - -#define CPU_SA1100_ID (0x4401a110) -#define CPU_SA1100_MASK (0xfffffff0) -#define CPU_SA1110_ID (0x6901b110) -#define CPU_SA1110_MASK (0xfffffff0) diff --git a/arch/arm/mach-sa1100/include/mach/hardware.h b/arch/arm/mach-sa1100/include/mach/hardware.h index 5976435f42c2..b70846c096aa 100644 --- a/arch/arm/mach-sa1100/include/mach/hardware.h +++ b/arch/arm/mach-sa1100/include/mach/hardware.h @@ -36,8 +36,26 @@ #define io_v2p( x ) \ ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START ) +#define CPU_SA1110_A0 (0) +#define CPU_SA1110_B0 (4) +#define CPU_SA1110_B1 (5) +#define CPU_SA1110_B2 (6) +#define CPU_SA1110_B4 (8) + +#define CPU_SA1100_ID (0x4401a110) +#define CPU_SA1100_MASK (0xfffffff0) +#define CPU_SA1110_ID (0x6901b110) +#define CPU_SA1110_MASK (0xfffffff0) + #ifndef __ASSEMBLY__ +#include <asm/cputype.h> + +#define CPU_REVISION (read_cpuid_id() & 15) + +#define cpu_is_sa1100() ((read_cpuid_id() & CPU_SA1100_MASK) == CPU_SA1100_ID) +#define cpu_is_sa1110() ((read_cpuid_id() & CPU_SA1110_MASK) == CPU_SA1110_ID) + # define __REG(x) (*((volatile unsigned long *)io_p2v(x))) # define __PREG(x) (io_v2p((unsigned long)&(x))) diff --git a/arch/arm/mach-sa1100/include/mach/memory.h b/arch/arm/mach-sa1100/include/mach/memory.h index 29f639e2afc6..1c127b68581d 100644 --- a/arch/arm/mach-sa1100/include/mach/memory.h +++ b/arch/arm/mach-sa1100/include/mach/memory.h @@ -40,23 +40,21 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes); #define __bus_to_virt(x) __phys_to_virt(x) /* - * Because of the wide memory address space between physical RAM banks on the - * SA1100, it's much convenient to use Linux's NUMA support to implement our - * memory map representation. Assuming all memory nodes have equal access + * Because of the wide memory address space between physical RAM banks on the + * SA1100, it's much convenient to use Linux's SparseMEM support to implement + * our memory map representation. Assuming all memory nodes have equal access * characteristics, we then have generic discontiguous memory support. * - * Of course, all this isn't mandatory for SA1100 implementations with only - * one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM. - * - * The nodes are matched with the physical memory bank addresses which are - * incidentally the same as virtual addresses. + * The sparsemem banks are matched with the physical memory bank addresses + * which are incidentally the same as virtual addresses. * * node 0: 0xc0000000 - 0xc7ffffff * node 1: 0xc8000000 - 0xcfffffff * node 2: 0xd0000000 - 0xd7ffffff * node 3: 0xd8000000 - 0xdfffffff */ -#define NODE_MEM_SIZE_BITS 27 +#define MAX_PHYSMEM_BITS 32 +#define SECTION_SIZE_BITS 27 /* * Cache flushing area - SA1100 zero bank diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c index 86369a8f0cea..3093d46a9c6f 100644 --- a/arch/arm/mach-sa1100/irq.c +++ b/arch/arm/mach-sa1100/irq.c @@ -122,14 +122,12 @@ sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc) GEDR = mask; irq = IRQ_GPIO11; - desc = irq_desc + irq; mask >>= 11; do { if (mask & 1) - desc_handle_irq(irq, desc); + generic_handle_irq(irq); mask >>= 1; irq++; - desc++; } while (mask); mask = GEDR & 0xfffff800; diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c index 4856a6bd2482..6ccd175bc4cf 100644 --- a/arch/arm/mach-sa1100/neponset.c +++ b/arch/arm/mach-sa1100/neponset.c @@ -33,8 +33,6 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc) unsigned int irr; while (1) { - struct irq_desc *d; - /* * Acknowledge the parent IRQ. */ @@ -67,21 +65,18 @@ neponset_irq_handler(unsigned int irq, struct irq_desc *desc) desc->chip->ack(irq); if (irr & IRR_ETHERNET) { - d = irq_desc + IRQ_NEPONSET_SMC9196; - desc_handle_irq(IRQ_NEPONSET_SMC9196, d); + generic_handle_irq(IRQ_NEPONSET_SMC9196); } if (irr & IRR_USAR) { - d = irq_desc + IRQ_NEPONSET_USAR; - desc_handle_irq(IRQ_NEPONSET_USAR, d); + generic_handle_irq(IRQ_NEPONSET_USAR); } desc->chip->unmask(irq); } if (irr & IRR_SA1111) { - d = irq_desc + IRQ_NEPONSET_SA1111; - desc_handle_irq(IRQ_NEPONSET_SA1111, d); + generic_handle_irq(IRQ_NEPONSET_SA1111); } } } diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c index 83be1c6c5f80..e45d3a1890bc 100644 --- a/arch/arm/mach-sa1100/pleb.c +++ b/arch/arm/mach-sa1100/pleb.c @@ -8,11 +8,10 @@ #include <linux/ioport.h> #include <linux/platform_device.h> #include <linux/irq.h> - +#include <linux/io.h> #include <linux/mtd/partitions.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/setup.h> #include <asm/mach-types.h> @@ -39,8 +38,8 @@ static struct resource smc91x_resources[] = { [0] = { - .start = PLEB_ETH0_P, - .end = PLEB_ETH0_P | 0x03ffffff, + .start = PLEB_ETH0_P, + .end = PLEB_ETH0_P | 0x03ffffff, .flags = IORESOURCE_MEM, }, #if 0 /* Autoprobe instead, to get rising/falling edge characteristic right */ @@ -87,15 +86,15 @@ static struct resource pleb_flash_resources[] = { static struct mtd_partition pleb_partitions[] = { { .name = "blob", - .offset = 0, + .offset = 0, .size = 0x00020000, }, { .name = "kernel", - .offset = MTDPART_OFS_APPEND, + .offset = MTDPART_OFS_APPEND, .size = 0x000e0000, }, { .name = "rootfs", - .offset = MTDPART_OFS_APPEND, + .offset = MTDPART_OFS_APPEND, .size = 0x00300000, } }; diff --git a/arch/arm/mach-sa1100/simpad.c b/arch/arm/mach-sa1100/simpad.c index 8dd635317959..3c74534f7fee 100644 --- a/arch/arm/mach-sa1100/simpad.c +++ b/arch/arm/mach-sa1100/simpad.c @@ -12,6 +12,7 @@ #include <linux/platform_device.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> +#include <linux/io.h> #include <asm/irq.h> #include <mach/hardware.h> @@ -27,7 +28,6 @@ #include <linux/serial_core.h> #include <linux/ioport.h> -#include <asm/io.h> #include "generic.h" diff --git a/arch/arm/mach-sa1100/ssp.c b/arch/arm/mach-sa1100/ssp.c index 641f361c56f4..b20ff93b84a5 100644 --- a/arch/arm/mach-sa1100/ssp.c +++ b/arch/arm/mach-sa1100/ssp.c @@ -17,8 +17,8 @@ #include <linux/interrupt.h> #include <linux/ioport.h> #include <linux/init.h> +#include <linux/io.h> -#include <asm/io.h> #include <asm/irq.h> #include <mach/hardware.h> #include <asm/hardware/ssp.h> |