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| author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2013-11-12 23:56:02 +0400 |
|---|---|---|
| committer | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2013-12-20 14:41:37 +0400 |
| commit | dc2fc2270cba696bd1211124f43efd2d6476808c (patch) | |
| tree | 0c01518553a1690567095f896b6bc2658cc6d9f0 /arch/arm/mach-sa1100/time.c | |
| parent | 980c51ab0774b7cd701eeb84056c148f84e152d8 (diff) | |
| download | linux-dc2fc2270cba696bd1211124f43efd2d6476808c.tar.xz | |
ARM: sa1100: stop using mach/timex.h
mach/timex.h is the last remaining header that is unused for multiarch
builds but necessary for singlearch builds. To allow to get rid of it
for singlearch builds, too, drop its usage in sa1100 arch code by
substituting CLOCK_TICK_RATE and LATCH by a local cpp symbol.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-sa1100/time.c')
| -rw-r--r-- | arch/arm/mach-sa1100/time.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index 713c86cd3d64..b4e7f2d133d9 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c @@ -9,6 +9,7 @@ * */ #include <linux/init.h> +#include <linux/kernel.h> #include <linux/errno.h> #include <linux/interrupt.h> #include <linux/irq.h> @@ -20,6 +21,9 @@ #include <mach/hardware.h> #include <mach/irqs.h> +#define SA1100_CLOCK_FREQ 3686400 +#define SA1100_LATCH DIV_ROUND_CLOSEST(SA1100_CLOCK_FREQ, HZ) + static u32 notrace sa1100_read_sched_clock(void) { return readl_relaxed(OSCR); @@ -93,7 +97,7 @@ static void sa1100_timer_resume(struct clock_event_device *cedev) /* * OSMR0 is the system timer: make sure OSCR is sufficiently behind */ - writel_relaxed(OSMR0 - LATCH, OSCR); + writel_relaxed(OSMR0 - SA1100_LATCH, OSCR); } #else #define sa1100_timer_suspend NULL @@ -128,7 +132,7 @@ void __init sa1100_timer_init(void) setup_irq(IRQ_OST0, &sa1100_timer_irq); - clocksource_mmio_init(OSCR, "oscr", CLOCK_TICK_RATE, 200, 32, + clocksource_mmio_init(OSCR, "oscr", SA1100_CLOCK_FREQ, 200, 32, clocksource_mmio_readl_up); clockevents_config_and_register(&ckevt_sa1100_osmr0, 3686400, MIN_OSCR_DELTA * 2, 0x7fffffff); |