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authorBjorn Helgaas <bhelgaas@google.com>2012-02-24 07:19:01 +0400
committerBjorn Helgaas <bhelgaas@google.com>2012-02-24 07:19:01 +0400
commit9f786d033d025ab7d2c4d1b959aa81d935eb9e19 (patch)
tree5a92b3c43935efd5044972fb45eaa2c7ca1c2fcf /arch/arm/mach-sa1100/pci-nanoengine.c
parentc04d9e35790013606f18cf56db07f80c3a339608 (diff)
downloadlinux-9f786d033d025ab7d2c4d1b959aa81d935eb9e19.tar.xz
arm/PCI: get rid of device resource fixups
Tell the PCI core about host bridge address translation so it can take care of bus-to-resource conversion for us. CC: Russell King <linux@arm.linux.org.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'arch/arm/mach-sa1100/pci-nanoengine.c')
-rw-r--r--arch/arm/mach-sa1100/pci-nanoengine.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c
index 0d01ca788922..b466bca9c651 100644
--- a/arch/arm/mach-sa1100/pci-nanoengine.c
+++ b/arch/arm/mach-sa1100/pci-nanoengine.c
@@ -244,9 +244,11 @@ static int __init pci_nanoengine_setup_resources(struct pci_sys_data *sys)
printk(KERN_ERR "PCI: unable to allocate prefetchable\n");
return -EBUSY;
}
- pci_add_resource(&sys->resources, &pci_io_ports);
- pci_add_resource(&sys->resources, &pci_non_prefetchable_memory);
- pci_add_resource(&sys->resources, &pci_prefetchable_memory);
+ pci_add_resource_offset(&sys->resources, &pci_io_ports, sys->io_offset);
+ pci_add_resource_offset(&sys->resources,
+ &pci_non_prefetchable_memory, sys->mem_offset);
+ pci_add_resource_offset(&sys->resources,
+ &pci_prefetchable_memory, sys->mem_offset);
return 1;
}