diff options
author | Ben Dooks <ben-linux@fluff.org> | 2010-10-01 11:49:11 +0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-23 06:50:25 +0400 |
commit | a40af06655f97d88fc1b0fcc9b5f2a5c06a27a4a (patch) | |
tree | d6eb02bef531690e0ca1262c5cfe7c934189738c /arch/arm/mach-s5pc100/setup-fb-24bpp.c | |
parent | f90715f9f07abcfff3b994a0f5b7edf7a78a5aec (diff) | |
download | linux-a40af06655f97d88fc1b0fcc9b5f2a5c06a27a4a.tar.xz |
ARM: S5PC100: Change to using s3c_gpio_cfgall_range()
Change the code setting a range of GPIO pins' configuration and
pull state to use the recently introduced s3c_gpio_cfgall_range().
Mop up a few missed s3c_gpio_cfgpin_range() changes.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pc100/setup-fb-24bpp.c')
-rw-r--r-- | arch/arm/mach-s5pc100/setup-fb-24bpp.c | 30 |
1 files changed, 9 insertions, 21 deletions
diff --git a/arch/arm/mach-s5pc100/setup-fb-24bpp.c b/arch/arm/mach-s5pc100/setup-fb-24bpp.c index 6eba6cb8e2f4..5a882d46c3f5 100644 --- a/arch/arm/mach-s5pc100/setup-fb-24bpp.c +++ b/arch/arm/mach-s5pc100/setup-fb-24bpp.c @@ -22,27 +22,15 @@ #define DISR_OFFSET 0x7008 -void s5pc100_fb_gpio_setup_24bpp(void) +static void s5pc100_fb_setgpios(unsigned int base, unsigned int nr) { - unsigned int gpio = 0; - - for (gpio = S5PC100_GPF0(0); gpio <= S5PC100_GPF0(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - - for (gpio = S5PC100_GPF1(0); gpio <= S5PC100_GPF1(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - - for (gpio = S5PC100_GPF2(0); gpio <= S5PC100_GPF2(7); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } + s3c_gpio_cfgall_range(base, nr, S3C_GPIO_SFN(2), S3C_GPIO_PULL_NONE); +} - for (gpio = S5PC100_GPF3(0); gpio <= S5PC100_GPF3(3); gpio++) { - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } +void s5pc100_fb_gpio_setup_24bpp(void) +{ + s5pc100_fb_setgpios(S5PC100_GPF0(0), 8); + s5pc100_fb_setgpios(S5PC100_GPF1(0), 8); + s5pc100_fb_setgpios(S5PC100_GPF2(0), 8); + s5pc100_fb_setgpios(S5PC100_GPF3(0), 4); } |