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authorLinus Torvalds <torvalds@linux-foundation.org>2011-01-15 23:33:40 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2011-01-15 23:33:40 +0300
commit16c1020362083b320868c0deef492249089c3cd3 (patch)
treeff200df3502e6010745713275d69fd0a07e399cf /arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
parent65e5d002b5ad220db2bf9557f53de5a98f7dab86 (diff)
parentbbba75606963c82febf7bd2761ea848ac5d1a1bb (diff)
downloadlinux-16c1020362083b320868c0deef492249089c3cd3.tar.xz
Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (161 commits) ARM: pxa: fix building issue of missing physmap.h ARM: mmp: PXA910 drive strength FAST using wrong value ARM: mmp: MMP2 drive strength FAST using wrong value ARM: pxa: fix recursive calls in pxa_low_gpio_chip AT91: Support for gsia18s board AT91: Acme Systems FOX Board G20 board files AT91: board-sam9m10g45ek.c: Remove duplicate inclusion of mach/hardware.h ARM: pxa: fix suspend/resume array index miscalculation ARM: pxa: use cpu_has_ipr() consistently in irq.c ARM: pxa: remove unused variable in clock-pxa3xx.c ARM: pxa: fix warning in zeus.c ARM: sa1111: fix typo in sa1111_retrigger_lowirq() ARM mxs: clkdev related compile fixes ARM i.MX mx31_3ds: Fix MC13783 regulator names ARM: plat-stmp3xxx: irq_data conversion. ARM: plat-spear: irq_data conversion. ARM: plat-orion: irq_data conversion. ARM: plat-omap: irq_data conversion. ARM: plat-nomadik: irq_data conversion. ARM: plat-mxc: irq_data conversion. ... Fix up trivial conflict in arch/arm/plat-omap/gpio.c (Lennert Buytenhek's irq_data conversion clashing with some omap irq updates)
Diffstat (limited to 'arch/arm/mach-s5p64x0/include/mach/regs-gpio.h')
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/regs-gpio.h57
1 files changed, 16 insertions, 41 deletions
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
index 85f448e20a8b..0953ef6b1c77 100644
--- a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
@@ -15,48 +15,23 @@
#include <mach/map.h>
-/* Will be implemented S5P6442 GPIOlib */
-
/* Base addresses for each of the banks */
-#define S5P6440_GPA_BASE (S5P_VA_GPIO + 0x0000)
-#define S5P6440_GPB_BASE (S5P_VA_GPIO + 0x0020)
-#define S5P6440_GPC_BASE (S5P_VA_GPIO + 0x0040)
-#define S5P6440_GPF_BASE (S5P_VA_GPIO + 0x00A0)
-#define S5P6440_GPG_BASE (S5P_VA_GPIO + 0x00C0)
-#define S5P6440_GPH_BASE (S5P_VA_GPIO + 0x00E0)
-#define S5P6440_GPI_BASE (S5P_VA_GPIO + 0x0100)
-#define S5P6440_GPJ_BASE (S5P_VA_GPIO + 0x0120)
-#define S5P6440_GPN_BASE (S5P_VA_GPIO + 0x0830)
-#define S5P6440_GPP_BASE (S5P_VA_GPIO + 0x0160)
-#define S5P6440_GPR_BASE (S5P_VA_GPIO + 0x0290)
-
-#define S5P6440_EINT0CON0 (S5P_VA_GPIO + 0x900)
-#define S5P6440_EINT0FLTCON0 (S5P_VA_GPIO + 0x910)
-#define S5P6440_EINT0FLTCON1 (S5P_VA_GPIO + 0x914)
-#define S5P6440_EINT0MASK (S5P_VA_GPIO + 0x920)
-#define S5P6440_EINT0PEND (S5P_VA_GPIO + 0x924)
-
-/* for LCD */
-
-#define S5P6440_SPCON_LCD_SEL_RGB (1 << 0)
-#define S5P6440_SPCON_LCD_SEL_MASK (3 << 0)
-
-/*
- * These set of macros are not really useful for the
- * GPF/GPI/GPJ/GPN/GPP, useful for others set of GPIO's (4 bit)
- */
-
-#define S5P6440_GPIO_CONMASK(__gpio) (0xf << ((__gpio) * 4))
-#define S5P6440_GPIO_INPUT(__gpio) (0x0 << ((__gpio) * 4))
-#define S5P6440_GPIO_OUTPUT(__gpio) (0x1 << ((__gpio) * 4))
-
-/*
- * Use these macros for GPF/GPI/GPJ/GPN/GPP set of GPIO (2 bit)
- */
-
-#define S5P6440_GPIO2_CONMASK(__gpio) (0x3 << ((__gpio) * 2))
-#define S5P6440_GPIO2_INPUT(__gpio) (0x0 << ((__gpio) * 2))
-#define S5P6440_GPIO2_OUTPUT(__gpio) (0x1 << ((__gpio) * 2))
+#define S5P64X0_GPA_BASE (S5P_VA_GPIO + 0x0000)
+#define S5P64X0_GPB_BASE (S5P_VA_GPIO + 0x0020)
+#define S5P64X0_GPC_BASE (S5P_VA_GPIO + 0x0040)
+#define S5P64X0_GPF_BASE (S5P_VA_GPIO + 0x00A0)
+#define S5P64X0_GPG_BASE (S5P_VA_GPIO + 0x00C0)
+#define S5P64X0_GPH_BASE (S5P_VA_GPIO + 0x00E0)
+#define S5P64X0_GPI_BASE (S5P_VA_GPIO + 0x0100)
+#define S5P64X0_GPJ_BASE (S5P_VA_GPIO + 0x0120)
+#define S5P64X0_GPN_BASE (S5P_VA_GPIO + 0x0830)
+#define S5P64X0_GPP_BASE (S5P_VA_GPIO + 0x0160)
+#define S5P64X0_GPR_BASE (S5P_VA_GPIO + 0x0290)
+
+#define S5P6450_GPD_BASE (S5P_VA_GPIO + 0x0060)
+#define S5P6450_GPK_BASE (S5P_VA_GPIO + 0x0140)
+#define S5P6450_GPQ_BASE (S5P_VA_GPIO + 0x0180)
+#define S5P6450_GPS_BASE (S5P_VA_GPIO + 0x0300)
#endif /* __ASM_ARCH_REGS_GPIO_H */