diff options
| author | Kukjin Kim <kgene.kim@samsung.com> | 2012-02-06 04:38:19 +0400 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2012-03-03 02:47:38 +0400 |
| commit | 85fd6d63bf2927b9da7ab1b0d46723bfdb13808c (patch) | |
| tree | 7033ac06e365209b09ba4b97eba0cf2f7ceb3312 /arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h | |
| parent | b130d5c29544fe4cedafd35b112d27a06550d844 (diff) | |
| download | linux-85fd6d63bf2927b9da7ab1b0d46723bfdb13808c.tar.xz | |
ARM: S3C2410: move mach-s3c2410/* into mach-s3c24xx/
This patch moves S3C2410 stuff into mach-s3c24xx/ directory
so that we can merge the s3c24 series' directories to the
just one mach-s3c24xx/ directory.
And this patch is including following.
- re-ordered alphabetically by option text at Kconfig and Makefile
- removed unused option, MACH_N35
- fixed duplcated option name, S3C2410_DMA to S3C24XX_DMA which is
in plat-s3c24xx/
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h')
| -rw-r--r-- | arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h b/arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h new file mode 100644 index 000000000000..e9e36b0abbac --- /dev/null +++ b/arch/arm/mach-s3c24xx/include/mach/osiris-cpld.h @@ -0,0 +1,30 @@ +/* arch/arm/mach-s3c2410/include/mach/osiris-cpld.h + * + * Copyright 2005 Simtec Electronics + * http://www.simtec.co.uk/products/ + * Ben Dooks <ben@simtec.co.uk> + * + * OSIRIS - CPLD control constants + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_OSIRISCPLD_H +#define __ASM_ARCH_OSIRISCPLD_H + +/* CTRL0 - NAND WP control */ + +#define OSIRIS_CTRL0_NANDSEL (0x3) +#define OSIRIS_CTRL0_BOOT_INT (1<<3) +#define OSIRIS_CTRL0_PCMCIA (1<<4) +#define OSIRIS_CTRL0_FIX8 (1<<5) +#define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6) +#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7) + +#define OSIRIS_CTRL1_FIX8 (1<<0) + +#define OSIRIS_ID_REVMASK (0x7) + +#endif /* __ASM_ARCH_OSIRISCPLD_H */ |