diff options
| author | Heiko Stuebner <heiko@sntech.de> | 2015-07-22 18:04:47 +0300 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2015-08-06 14:05:12 +0300 |
| commit | d1d3a1a1d745095261d4a927c0c06588e5bc7f6f (patch) | |
| tree | 92690f5fbc8d410f0fd674205e9a7b4089867567 /arch/arm/mach-rockchip/pm.h | |
| parent | 41fe6a01726b79b8531fed0a94b55d89a69ea5ee (diff) | |
| download | linux-d1d3a1a1d745095261d4a927c0c06588e5bc7f6f.tar.xz | |
ARM: rockchip: set correct stabilization thresholds in suspend
Currently the stabilization thresholds for the oscillator and external pmu
are statically set to 30ms based on a 32kHz clock rate. This leaves out the
case when we don't switch to the 32kHz clock when only entering the shallow
suspend mode where the logic keeps running.
So, set the correct threshold after we have determined if we switch to the
32kHz clock or stay with the 24MHz one. Also set the oscillator-
stabilization to 0 if it is kept running during suspend, as it of course
does not need to stabilize then.
Reported-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Tested-by: Chris Zhong <zyw@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Diffstat (limited to 'arch/arm/mach-rockchip/pm.h')
| -rw-r--r-- | arch/arm/mach-rockchip/pm.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/mach-rockchip/pm.h b/arch/arm/mach-rockchip/pm.h index b6494c2bd761..8a55ee2298f8 100644 --- a/arch/arm/mach-rockchip/pm.h +++ b/arch/arm/mach-rockchip/pm.h @@ -62,10 +62,6 @@ static inline void rockchip_suspend_init(void) /* PMU_WAKEUP_CFG1 bits */ #define PMU_ARMINT_WAKEUP_EN BIT(0) -/* wait 30ms for OSC stable and 30ms for pmic stable */ -#define OSC_STABL_CNT_THRESH (32 * 30) -#define PMU_STABL_CNT_THRESH (32 * 30) - enum rk3288_pwr_mode_con { PMU_PWR_MODE_EN = 0, PMU_CLK_CORE_SRC_GATE_EN, |