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| author | Zhiwu Song <zhiwu.song@csr.com> | 2011-08-31 06:20:34 +0400 |
|---|---|---|
| committer | Barry Song <21cnbao@gmail.com> | 2011-09-11 05:17:53 +0400 |
| commit | 684f741446f7a3108b4c167faf20214c42b7eeac (patch) | |
| tree | 7d6b2d4919640170f61aaaf5460e9b2a6dbb24cd /arch/arm/mach-prima2/Makefile | |
| parent | 858ba703e842f4ece6680b45862ee9e6e6297d1e (diff) | |
| download | linux-684f741446f7a3108b4c167faf20214c42b7eeac.tar.xz | |
ARM: CSR: add rtc i/o bridge interface for SiRFprimaII
The module is a bridge between the RTC clock domain and the CPU interface
clock domain. ARM access the register of SYSRTC, GPSRTC and PWRC through
this module.
Signed-off-by: Zhiwu Song <zhiwu.song@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-prima2/Makefile')
| -rw-r--r-- | arch/arm/mach-prima2/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-prima2/Makefile b/arch/arm/mach-prima2/Makefile index 7af7fc05d565..f49d70b86854 100644 --- a/arch/arm/mach-prima2/Makefile +++ b/arch/arm/mach-prima2/Makefile @@ -3,5 +3,6 @@ obj-y += irq.o obj-y += clock.o obj-y += rstc.o obj-y += prima2.o +obj-y += rtciobrg.o obj-$(CONFIG_DEBUG_LL) += lluart.o obj-$(CONFIG_CACHE_L2X0) += l2x0.o |