diff options
| author | Roger Quadros <rogerq@ti.com> | 2017-03-13 14:53:16 +0300 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2017-03-29 00:09:58 +0300 |
| commit | e2d54fe76997301b49311bde7ba8ef52b47896f9 (patch) | |
| tree | 3591709b562f1b18186558052baf9566f268ecfb /arch/arm/mach-omap2 | |
| parent | a2416238368839a25be0daa6c591b5102240975b (diff) | |
| download | linux-e2d54fe76997301b49311bde7ba8ef52b47896f9.tar.xz | |
ARM: DRA7: hwmod_data: Prevent wait_target_disable error for usb_otg_ss
It seems that if L3_INIT clkdomain is kept in HW_AUTO while usb_otg_ss
is in use then there are random chances that the usb_otg_ss module
will fail to completely idle. i.e. IDLEST = 0x2 instead of 0x3.
Preventing L3_INIT from HW_AUTO while usb_otg_ss module is in use
fixes this issue.
We don't know yet if usb_otg_ss instances 3 and 4 are affected by this
issue or not so don't add this flag for those instances.
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2')
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index 7c6baa73e9db..b3abb8d8b2f6 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -2701,6 +2701,7 @@ static struct omap_hwmod dra7xx_usb_otg_ss1_hwmod = { .class = &dra7xx_usb_otg_ss_hwmod_class, .clkdm_name = "l3init_clkdm", .main_clk = "dpll_core_h13x2_ck", + .flags = HWMOD_CLKDM_NOAUTO, .prcm = { .omap4 = { .clkctrl_offs = DRA7XX_CM_L3INIT_USB_OTG_SS1_CLKCTRL_OFFSET, @@ -2722,6 +2723,7 @@ static struct omap_hwmod dra7xx_usb_otg_ss2_hwmod = { .class = &dra7xx_usb_otg_ss_hwmod_class, .clkdm_name = "l3init_clkdm", .main_clk = "dpll_core_h13x2_ck", + .flags = HWMOD_CLKDM_NOAUTO, .prcm = { .omap4 = { .clkctrl_offs = DRA7XX_CM_L3INIT_USB_OTG_SS2_CLKCTRL_OFFSET, |