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authorLinus Torvalds <torvalds@linux-foundation.org>2014-01-29 06:44:53 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-01-29 06:44:53 +0400
commitd30492adea3a82e7120bcf60893aaaab711f90a6 (patch)
tree082d1dff4d71ccbd722b5edd47411acad110b636 /arch/arm/mach-omap2/prm_common.c
parentf1499382f114231cbd1e3dee7e656b50ce9d8236 (diff)
parentfd3fdaf09f26cd4f53fd4d7cdfe8e3dbb55a4dda (diff)
downloadlinux-d30492adea3a82e7120bcf60893aaaab711f90a6.tar.xz
Merge tag 'clk-for-linus-3.14-part2' of git://git.linaro.org/people/mike.turquette/linux
Pull more clock framework changes from Mike Turquette: "The second half of the clock framework pull requeust for 3.14 is dominated by platform support for Qualcomm's MSM SoCs, DT binding updates for TI's OMAP-ish processors and additional support for Samsung chips. Additionally there are other smaller clock driver changes and several last minute fixes. This pull request also includes the HiSilicon support that depends on the already-merged arm-soc pull request" [ Fix up stupid compile error in the source tree with evil merge - Grumpy Linus ] * tag 'clk-for-linus-3.14-part2' of git://git.linaro.org/people/mike.turquette/linux: (49 commits) clk: sort Makefile clk: sunxi: fix overflow when setting up divided factors clk: Export more clk-provider functions dt-bindings: qcom: Fix warning with duplicate dt define clk: si5351: remove variant from platform_data clk: samsung: Remove unneeded semicolon clk: qcom: Fix modular build ARM: OMAP3: use DT clock init if DT data is available ARM: AM33xx: remove old clock data and link in new clock init code ARM: AM43xx: Enable clock init ARM: OMAP: DRA7: Enable clock init ARM: OMAP4: remove old clock data and link in new clock init code ARM: OMAP2+: io: use new clock init API ARM: OMAP2+: PRM: add support for initializing PRCM clock modules from DT ARM: OMAP3: hwmod: initialize clkdm from clkdm_name ARM: OMAP: hwmod: fix an incorrect clk type cast with _get_clkdm ARM: OMAP2+: clock: use driver API instead of direct memory read/write ARM: OMAP2+: clock: add support for indexed memmaps ARM: dts: am43xx clock data ARM: dts: AM35xx: use DT clock data ...
Diffstat (limited to 'arch/arm/mach-omap2/prm_common.c')
-rw-r--r--arch/arm/mach-omap2/prm_common.c66
1 files changed, 66 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index a2e1174ad1b6..b4c4ab9c8044 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -23,6 +23,10 @@
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/clk-provider.h>
+#include <linux/clk/ti.h>
#include "soc.h"
#include "prm2xxx_3xxx.h"
@@ -30,6 +34,7 @@
#include "prm3xxx.h"
#include "prm44xx.h"
#include "common.h"
+#include "clock.h"
/*
* OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
@@ -464,3 +469,64 @@ int prm_unregister(struct prm_ll_data *pld)
return 0;
}
+
+static struct of_device_id omap_prcm_dt_match_table[] = {
+ { .compatible = "ti,am3-prcm" },
+ { .compatible = "ti,am3-scrm" },
+ { .compatible = "ti,am4-prcm" },
+ { .compatible = "ti,am4-scrm" },
+ { .compatible = "ti,omap3-prm" },
+ { .compatible = "ti,omap3-cm" },
+ { .compatible = "ti,omap3-scrm" },
+ { .compatible = "ti,omap4-cm1" },
+ { .compatible = "ti,omap4-prm" },
+ { .compatible = "ti,omap4-cm2" },
+ { .compatible = "ti,omap4-scrm" },
+ { .compatible = "ti,omap5-prm" },
+ { .compatible = "ti,omap5-cm-core-aon" },
+ { .compatible = "ti,omap5-scrm" },
+ { .compatible = "ti,omap5-cm-core" },
+ { .compatible = "ti,dra7-prm" },
+ { .compatible = "ti,dra7-cm-core-aon" },
+ { .compatible = "ti,dra7-cm-core" },
+ { }
+};
+
+static struct clk_hw_omap memmap_dummy_ck = {
+ .flags = MEMMAP_ADDRESSING,
+};
+
+static u32 prm_clk_readl(void __iomem *reg)
+{
+ return omap2_clk_readl(&memmap_dummy_ck, reg);
+}
+
+static void prm_clk_writel(u32 val, void __iomem *reg)
+{
+ omap2_clk_writel(val, &memmap_dummy_ck, reg);
+}
+
+static struct ti_clk_ll_ops omap_clk_ll_ops = {
+ .clk_readl = prm_clk_readl,
+ .clk_writel = prm_clk_writel,
+};
+
+int __init of_prcm_init(void)
+{
+ struct device_node *np;
+ void __iomem *mem;
+ int memmap_index = 0;
+
+ ti_clk_ll_ops = &omap_clk_ll_ops;
+
+ for_each_matching_node(np, omap_prcm_dt_match_table) {
+ mem = of_iomap(np, 0);
+ clk_memmaps[memmap_index] = mem;
+ ti_dt_clk_init_provider(np, memmap_index);
+ memmap_index++;
+ }
+
+ ti_dt_clockdomains_setup();
+
+ return 0;
+}