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authorArnd Bergmann <arnd@arndb.de>2012-03-05 01:09:11 +0400
committerArnd Bergmann <arnd@arndb.de>2012-03-05 01:20:46 +0400
commit709baa67c676a187a63c0f0f40efceb3fb1eef72 (patch)
tree0a2b8bab5ac4f52069a1e50d20028ae44d8c256a /arch/arm/mach-omap2/pm24xx.c
parent281a9f78eaa5d0d78bd0e3acd181a24d3bad28e3 (diff)
parent8c690fdf465be9d97229f6bb0e6346624d6753a9 (diff)
downloadlinux-709baa67c676a187a63c0f0f40efceb3fb1eef72.tar.xz
Merge tag 'tegra-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra into tegra/soc2
From: Olof Johansson <olof@lixom.net> Tegra 30 SMP support I did this as a separate topic branch because it depends on both the soc and the soc-drivers branch, so it brings both of those in as a base. This branch contains work to enable SMP support on Tegra30 and reworks some of the SMP bringup for T20 as well. It also contains a device tree patch that builds on top of the SMP/clock changes in the rest of the branch, so it made more sense to apply it here than deal with the merge conflicts back and forth. * tag 'tegra-soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra: ARM: dt: Explicitly configure all serial ports on Tegra Cardhu ARM: tegra: support for secondary cores on Tegra30 ARM: tegra: support for Tegra30 CPU powerdomains ARM: tegra: add support for Tegra30 powerdomains ARM: tegra: export tegra_powergate_is_powered() ARM: tegra: prepare powergate.c for multiple variants ARM: tegra: rework Tegra secondary CPU core bringup ARM: tegra: functions to access the flowcontroller ARM: tegra: initialize Tegra chipid early ARM: tegra: export Tegra chipid ARM: tegra: cleanup use of chipid register Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-omap2/pm24xx.c')
-rw-r--r--arch/arm/mach-omap2/pm24xx.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index b8822f8b2891..23de98d03841 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -82,13 +82,7 @@ static int omap2_fclks_active(void)
f1 = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
f2 = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2);
- /* Ignore UART clocks. These are handled by UART core (serial.c) */
- f1 &= ~(OMAP24XX_EN_UART1_MASK | OMAP24XX_EN_UART2_MASK);
- f2 &= ~OMAP24XX_EN_UART3_MASK;
-
- if (f1 | f2)
- return 1;
- return 0;
+ return (f1 | f2) ? 1 : 0;
}
static void omap2_enter_full_retention(void)