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authorVictor Kamensky <victor.kamensky@linaro.org>2014-04-15 21:37:46 +0400
committerTony Lindgren <tony@atomide.com>2014-05-08 18:09:53 +0400
commitedfaf05c2fcb853fcf35f12aeb9c340f5913337f (patch)
treef3d0d7ca941855237953f65680932a8a433b0ed4 /arch/arm/mach-omap2/dma.c
parent89ca3b881987f5a4be4c5dbaa7f0df12bbdde2fd (diff)
downloadlinux-edfaf05c2fcb853fcf35f12aeb9c340f5913337f.tar.xz
ARM: OMAP2+: raw read and write endian fix
All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/dma.c')
-rw-r--r--arch/arm/mach-omap2/dma.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c
index 5689c88d986d..a6d2cf1f8d02 100644
--- a/arch/arm/mach-omap2/dma.c
+++ b/arch/arm/mach-omap2/dma.c
@@ -91,7 +91,7 @@ static inline void dma_write(u32 val, int reg, int lch)
addr += reg_map[reg].offset;
addr += reg_map[reg].stride * lch;
- __raw_writel(val, addr);
+ writel_relaxed(val, addr);
}
static inline u32 dma_read(int reg, int lch)
@@ -101,7 +101,7 @@ static inline u32 dma_read(int reg, int lch)
addr += reg_map[reg].offset;
addr += reg_map[reg].stride * lch;
- return __raw_readl(addr);
+ return readl_relaxed(addr);
}
static void omap2_clear_dma(int lch)