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| author | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2010-06-16 20:49:48 +0400 |
|---|---|---|
| committer | Kevin Hilman <khilman@ti.com> | 2011-12-08 23:29:00 +0400 |
| commit | b2b9762f76981c16a8768255284efeae7f27e4f1 (patch) | |
| tree | 3538b853da88eedeb2c64646b9555736000ba73a /arch/arm/mach-omap2/common.h | |
| parent | fcf6efa3ffbc3cc19e7abe39e0b90f497df2fc42 (diff) | |
| download | linux-b2b9762f76981c16a8768255284efeae7f27e4f1.tar.xz | |
ARM: OMAP4: PM: Add CPUX OFF mode support
This patch adds the CPU0 and CPU1 off mode support. CPUX close switch
retention (CSWR) is not supported by hardware design.
The CPUx OFF mode isn't supported on OMAP4430 ES1.0
CPUx sleep code is common for hotplug, suspend and CPUilde.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/common.h')
| -rw-r--r-- | arch/arm/mach-omap2/common.h | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 7ebcb6a9b73e..36cdba7727f2 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -24,9 +24,11 @@ #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H +#ifndef __ASSEMBLER__ #include <linux/delay.h> #include <plat/common.h> +#include <asm/proc-fns.h> #ifdef CONFIG_SOC_OMAP2420 extern void omap242x_map_common_io(void); @@ -183,6 +185,7 @@ static inline void __iomem *omap4_get_scu_base(void) extern void __init gic_init_irq(void); extern void omap_smc1(u32 fn, u32 arg); extern void __iomem *omap4_get_sar_ram_base(void); +extern void omap_do_wfi(void); #ifdef CONFIG_SMP /* Needed for secondary core boot */ @@ -192,4 +195,31 @@ extern void omap_auxcoreboot_addr(u32 cpu_addr); extern u32 omap_read_auxcoreboot0(void); #endif +#if defined(CONFIG_SMP) && defined(CONFIG_PM) +extern int omap4_mpuss_init(void); +extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state); +extern int omap4_finish_suspend(unsigned long cpu_state); +extern void omap4_cpu_resume(void); +#else +static inline int omap4_enter_lowpower(unsigned int cpu, + unsigned int power_state) +{ + cpu_do_idle(); + return 0; +} + +static inline int omap4_mpuss_init(void) +{ + return 0; +} + +static inline int omap4_finish_suspend(unsigned long cpu_state) +{ + return 0; +} + +static inline void omap4_cpu_resume(void) +{} +#endif +#endif /* __ASSEMBLER__ */ #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ |