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| author | Paul Walmsley <paul@pwsan.com> | 2011-02-26 01:49:53 +0300 |
|---|---|---|
| committer | Paul Walmsley <paul@pwsan.com> | 2011-03-08 06:02:05 +0300 |
| commit | 0fd0c21be71293d8a54d9075b18b5a25a1868057 (patch) | |
| tree | ebf500cb2d7b0c104fc1e1c190aa3b2457d987c8 /arch/arm/mach-omap2/cm2xxx_3xxx.h | |
| parent | c6461f5c5970833cf28c5096cdfc7a095eb3bbb5 (diff) | |
| download | linux-0fd0c21be71293d8a54d9075b18b5a25a1868057.tar.xz | |
OMAP2: clock: add DPLL autoidle support
Add the necessary code and data to allow the clock framework to enable
and disable the OMAP2 DPLL autoidle state. This is so the direct
register access can be moved out of the mach-omap2/pm24xx.c code, and other
code that needs to control this (e.g., CPUIdle) can do so via an API.
As part of this patch, remove the pm24xx.c code that formerly wrote
directly to the autoidle bits.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/cm2xxx_3xxx.h')
| -rw-r--r-- | arch/arm/mach-omap2/cm2xxx_3xxx.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.h b/arch/arm/mach-omap2/cm2xxx_3xxx.h index 5e9ea5bd60b9..5f4df1ceafad 100644 --- a/arch/arm/mach-omap2/cm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/cm2xxx_3xxx.h @@ -122,6 +122,9 @@ extern void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask); extern void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask); extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask); +extern void omap2xxx_cm_set_dpll_disable_autoidle(void); +extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void); + #endif /* CM register bits shared between 24XX and 3430 */ |