diff options
author | Benoit Cousson <b-cousson@ti.com> | 2011-07-10 05:15:06 +0400 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2011-07-10 05:15:06 +0400 |
commit | 3c95b707caf3504b37b11d2662bde77e1618d481 (patch) | |
tree | 0997b309bcce522718cdd97daa6ccdd38f9a1884 /arch/arm/mach-omap2/clockdomains44xx_data.c | |
parent | a3b90ad8d1fb0ddaa6964d83886283ae3e338cea (diff) | |
download | linux-3c95b707caf3504b37b11d2662bde77e1618d481.tar.xz |
OMAP4: clockdomain data: Fix data order and wrong name
MPUSS was renamed MPU and L3_D2D D2D.
The rename will slightly change the order of the structure
and thus generate some structures moves.
Add a comment and remove a comma.
Update Copyright for TI and Nokia and add back Paul
in the author list.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/clockdomains44xx_data.c')
-rw-r--r-- | arch/arm/mach-omap2/clockdomains44xx_data.c | 124 |
1 files changed, 63 insertions, 61 deletions
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c index a607ec196e8b..66090f2676ce 100644 --- a/arch/arm/mach-omap2/clockdomains44xx_data.c +++ b/arch/arm/mach-omap2/clockdomains44xx_data.c @@ -1,11 +1,12 @@ /* * OMAP4 Clock domains framework * - * Copyright (C) 2009 Texas Instruments, Inc. - * Copyright (C) 2009 Nokia Corporation + * Copyright (C) 2009-2011 Texas Instruments, Inc. + * Copyright (C) 2009-2011 Nokia Corporation * * Abhijit Pagare (abhijitpagare@ti.com) * Benoit Cousson (b-cousson@ti.com) + * Paul Walmsley (paul@pwsan.com) * * This file is automatically generated from the OMAP hardware databases. * We respectfully ask that any modifications to this file be coordinated @@ -32,7 +33,7 @@ /* Static Dependencies for OMAP4 Clock Domains */ -static struct clkdm_dep ducati_wkup_sleep_deps[] = { +static struct clkdm_dep d2d_wkup_sleep_deps[] = { { .clkdm_name = "abe_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) @@ -50,103 +51,103 @@ static struct clkdm_dep ducati_wkup_sleep_deps[] = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_dss_clkdm", + .clkdm_name = "l3_emif_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_emif_clkdm", + .clkdm_name = "l3_init_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_gfx_clkdm", + .clkdm_name = "l4_cfg_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_init_clkdm", + .clkdm_name = "l4_per_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, + { NULL }, +}; + +static struct clkdm_dep ducati_wkup_sleep_deps[] = { { - .clkdm_name = "l4_cfg_clkdm", + .clkdm_name = "abe_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l4_per_clkdm", + .clkdm_name = "ivahd_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l4_secure_clkdm", + .clkdm_name = "l3_1_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l4_wkup_clkdm", + .clkdm_name = "l3_2_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "tesla_clkdm", + .clkdm_name = "l3_dss_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, - { NULL }, -}; - -static struct clkdm_dep iss_wkup_sleep_deps[] = { { - .clkdm_name = "ivahd_clkdm", + .clkdm_name = "l3_emif_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_1_clkdm", + .clkdm_name = "l3_gfx_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_emif_clkdm", + .clkdm_name = "l3_init_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, - { NULL }, -}; - -static struct clkdm_dep ivahd_wkup_sleep_deps[] = { { - .clkdm_name = "l3_1_clkdm", + .clkdm_name = "l4_cfg_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_emif_clkdm", + .clkdm_name = "l4_per_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, - { NULL }, -}; - -static struct clkdm_dep l3_d2d_wkup_sleep_deps[] = { { - .clkdm_name = "abe_clkdm", + .clkdm_name = "l4_secure_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "ivahd_clkdm", + .clkdm_name = "l4_wkup_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_1_clkdm", + .clkdm_name = "tesla_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, + { NULL }, +}; + +static struct clkdm_dep iss_wkup_sleep_deps[] = { { - .clkdm_name = "l3_2_clkdm", + .clkdm_name = "ivahd_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_emif_clkdm", + .clkdm_name = "l3_1_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l3_init_clkdm", + .clkdm_name = "l3_emif_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, + { NULL }, +}; + +static struct clkdm_dep ivahd_wkup_sleep_deps[] = { { - .clkdm_name = "l4_cfg_clkdm", + .clkdm_name = "l3_1_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { - .clkdm_name = "l4_per_clkdm", + .clkdm_name = "l3_emif_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) }, { NULL }, @@ -280,7 +281,7 @@ static struct clkdm_dep l4_secure_wkup_sleep_deps[] = { { NULL }, }; -static struct clkdm_dep mpuss_wkup_sleep_deps[] = { +static struct clkdm_dep mpu_wkup_sleep_deps[] = { { .clkdm_name = "abe_clkdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) @@ -497,14 +498,14 @@ static struct clockdomain l3_init_44xx_clkdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -static struct clockdomain mpuss_44xx_clkdm = { - .name = "mpuss_clkdm", - .pwrdm = { .name = "mpu_pwrdm" }, - .prcm_partition = OMAP4430_CM1_PARTITION, - .cm_inst = OMAP4430_CM1_MPU_INST, - .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS, - .wkdep_srcs = mpuss_wkup_sleep_deps, - .sleepdep_srcs = mpuss_wkup_sleep_deps, +static struct clockdomain d2d_44xx_clkdm = { + .name = "d2d_clkdm", + .pwrdm = { .name = "core_pwrdm" }, + .prcm_partition = OMAP4430_CM2_PARTITION, + .cm_inst = OMAP4430_CM2_CORE_INST, + .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS, + .wkdep_srcs = d2d_wkup_sleep_deps, + .sleepdep_srcs = d2d_wkup_sleep_deps, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -563,6 +564,18 @@ static struct clockdomain ducati_44xx_clkdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; +static struct clockdomain mpu_44xx_clkdm = { + .name = "mpu_clkdm", + .pwrdm = { .name = "mpu_pwrdm" }, + .prcm_partition = OMAP4430_CM1_PARTITION, + .cm_inst = OMAP4430_CM1_MPU_INST, + .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS, + .wkdep_srcs = mpu_wkup_sleep_deps, + .sleepdep_srcs = mpu_wkup_sleep_deps, + .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), +}; + static struct clockdomain l3_2_44xx_clkdm = { .name = "l3_2_clkdm", .pwrdm = { .name = "core_pwrdm" }, @@ -585,18 +598,6 @@ static struct clockdomain l3_1_44xx_clkdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; -static struct clockdomain l3_d2d_44xx_clkdm = { - .name = "l3_d2d_clkdm", - .pwrdm = { .name = "core_pwrdm" }, - .prcm_partition = OMAP4430_CM2_PARTITION, - .cm_inst = OMAP4430_CM2_CORE_INST, - .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS, - .wkdep_srcs = l3_d2d_wkup_sleep_deps, - .sleepdep_srcs = l3_d2d_wkup_sleep_deps, - .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), -}; - static struct clockdomain iss_44xx_clkdm = { .name = "iss_clkdm", .pwrdm = { .name = "cam_pwrdm" }, @@ -655,6 +656,7 @@ static struct clockdomain l3_dma_44xx_clkdm = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; +/* As clockdomains are added or removed above, this list must also be changed */ static struct clockdomain *clockdomains_omap44xx[] __initdata = { &l4_cefuse_44xx_clkdm, &l4_cfg_44xx_clkdm, @@ -666,21 +668,21 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = { &abe_44xx_clkdm, &l3_instr_44xx_clkdm, &l3_init_44xx_clkdm, - &mpuss_44xx_clkdm, + &d2d_44xx_clkdm, &mpu0_44xx_clkdm, &mpu1_44xx_clkdm, &l3_emif_44xx_clkdm, &l4_ao_44xx_clkdm, &ducati_44xx_clkdm, + &mpu_44xx_clkdm, &l3_2_44xx_clkdm, &l3_1_44xx_clkdm, - &l3_d2d_44xx_clkdm, &iss_44xx_clkdm, &l3_dss_44xx_clkdm, &l4_wkup_44xx_clkdm, &emu_sys_44xx_clkdm, &l3_dma_44xx_clkdm, - NULL, + NULL }; void __init omap44xx_clockdomains_init(void) |