summaryrefslogtreecommitdiff
path: root/arch/arm/mach-omap2/clock3xxx.c
diff options
context:
space:
mode:
authorRussell King <rmk+kernel@arm.linux.org.uk>2012-10-11 13:55:04 +0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-10-11 13:55:04 +0400
commita0f0dd57f4a85310d9936f1770a0424b49fef876 (patch)
tree2f85b8b67dda13d19b02ca39e0fbef921cb1cf8b /arch/arm/mach-omap2/clock3xxx.c
parent2a552d5e63d7fa602c9a9a0717008737f55625a6 (diff)
parent846a136881b8f73c1f74250bf6acfaa309cab1f2 (diff)
downloadlinux-a0f0dd57f4a85310d9936f1770a0424b49fef876.tar.xz
Merge branch 'fixes' into for-linus
Conflicts: arch/arm/kernel/smp.c
Diffstat (limited to 'arch/arm/mach-omap2/clock3xxx.c')
-rw-r--r--arch/arm/mach-omap2/clock3xxx.c13
1 files changed, 6 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c
index 794d82702c85..83bb01427d40 100644
--- a/arch/arm/mach-omap2/clock3xxx.c
+++ b/arch/arm/mach-omap2/clock3xxx.c
@@ -21,9 +21,9 @@
#include <linux/clk.h>
#include <linux/io.h>
-#include <plat/hardware.h>
#include <plat/clock.h>
+#include "soc.h"
#include "clock.h"
#include "clock3xxx.h"
#include "prm2xxx_3xxx.h"
@@ -49,8 +49,7 @@ int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate)
* on DPLL4.
*/
if (omap_rev() == OMAP3430_REV_ES1_0) {
- pr_err("clock: DPLL4 cannot change rate due to "
- "silicon 'Limitation 2.5' on 3430ES1.\n");
+ pr_err("clock: DPLL4 cannot change rate due to silicon 'Limitation 2.5' on 3430ES1.\n");
return -EINVAL;
}
@@ -64,15 +63,15 @@ void __init omap3_clk_lock_dpll5(void)
dpll5_clk = clk_get(NULL, "dpll5_ck");
clk_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST);
- clk_enable(dpll5_clk);
+ clk_prepare_enable(dpll5_clk);
/* Program dpll5_m2_clk divider for no division */
dpll5_m2_clk = clk_get(NULL, "dpll5_m2_ck");
- clk_enable(dpll5_m2_clk);
+ clk_prepare_enable(dpll5_m2_clk);
clk_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST);
- clk_disable(dpll5_m2_clk);
- clk_disable(dpll5_clk);
+ clk_disable_unprepare(dpll5_m2_clk);
+ clk_disable_unprepare(dpll5_clk);
return;
}