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authorDong Aisheng <b29396@freescale.com>2011-11-22 19:54:25 +0400
committerShawn Guo <shawn.guo@linaro.org>2011-12-02 09:57:16 +0400
commitb07fed455c883f07f8e847f5b0d79975b4dc8e7a (patch)
tree9e95abaf3067407b47402f6ccea2bfb221ac8ba7 /arch/arm/mach-mxs
parent4c0174c52010435e6e0158500033868dc404f014 (diff)
downloadlinux-b07fed455c883f07f8e847f5b0d79975b4dc8e7a.tar.xz
ARM: mx28evk: set a initial clock rate for saif
Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Marek Vasut <marek.vasut@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Wolfram Sang <w.sang@pengutronix.de> Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Liam Girdwood <lrg@ti.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-mxs')
-rw-r--r--arch/arm/mach-mxs/clock-mx28.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index 60c189a441b7..df0ad3ce234b 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -814,6 +814,15 @@ int __init mx28_clocks_init(void)
clk_set_parent(&saif0_clk, &pll0_clk);
clk_set_parent(&saif1_clk, &pll0_clk);
+ /*
+ * Set an initial clock rate for the saif internal logic to work
+ * properly. This is important when working in EXTMASTER mode that
+ * uses the other saif's BITCLK&LRCLK but it still needs a basic
+ * clock which should be fast enough for the internal logic.
+ */
+ clk_set_rate(&saif0_clk, 24000000);
+ clk_set_rate(&saif1_clk, 24000000);
+
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
mxs_timer_init(&clk32k_clk, MX28_INT_TIMER0);