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| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-04-18 20:12:14 +0400 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-04-18 20:12:14 +0400 |
| commit | fac56c2df51bc29b07b3c2dcfabf32a015a0522c (patch) | |
| tree | 1ff5d84ecf4ea0bcbd42e2ef9624b5ade3810890 /arch/arm/mach-lpc32xx/pm.c | |
| parent | 6caa15d0b84d2ea688fd31f4f172c8353463e109 (diff) | |
| parent | a6360dd37e1a144ed11e6548371bade559a1e4df (diff) | |
| download | linux-fac56c2df51bc29b07b3c2dcfabf32a015a0522c.tar.xz | |
Merge commit 'v2.6.39-rc3' into for-2.6.39
Diffstat (limited to 'arch/arm/mach-lpc32xx/pm.c')
| -rw-r--r-- | arch/arm/mach-lpc32xx/pm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-lpc32xx/pm.c b/arch/arm/mach-lpc32xx/pm.c index e76d41bb7056..b9c80597b7bf 100644 --- a/arch/arm/mach-lpc32xx/pm.c +++ b/arch/arm/mach-lpc32xx/pm.c @@ -41,7 +41,7 @@ * DRAM clocking and refresh are slightly different for systems with DDR * DRAM or regular SDRAM devices. If SDRAM is used in the system, the * SDRAM will still be accessible in direct-run mode. In DDR based systems, - * a transistion to direct-run mode will stop all DDR accesses (no clocks). + * a transition to direct-run mode will stop all DDR accesses (no clocks). * Because of this, the code to switch power modes and the code to enter * and exit DRAM self-refresh modes must not be executed in DRAM. A small * section of IRAM is used instead for this. |