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authorThierry Reding <treding@nvidia.com>2014-10-01 16:15:34 +0400
committerThierry Reding <treding@nvidia.com>2014-11-10 17:59:20 +0300
commit2e0fa0c95393f51ed356b351d66a37a82f867dc6 (patch)
tree50aa8bed4bc6dd2327b1ef447e79b85626bb1657 /arch/arm/mach-ixp4xx
parente43b21cbbd816aebbb275093f22a974f7b0cb345 (diff)
downloadlinux-2e0fa0c95393f51ed356b351d66a37a82f867dc6.tar.xz
ARM: ixp4xx: Properly override I/O accessors
In order to override accessors properly they must be #define'd so that subsequent generic headers (the one for ARM and finally the architecture independent one) can properly detect it. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/mach-ixp4xx')
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/io.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index 0f737fcebcc1..6a722860e34d 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -234,6 +234,7 @@ static inline void __indirect_readsl(const volatile void __iomem *bus_addr,
* I/O functions.
*/
+#define outb outb
static inline void outb(u8 value, u32 addr)
{
u32 n, byte_enables, data;
@@ -243,12 +244,14 @@ static inline void outb(u8 value, u32 addr)
ixp4xx_pci_write(addr, byte_enables | NP_CMD_IOWRITE, data);
}
+#define outsb outsb
static inline void outsb(u32 io_addr, const u8 *vaddr, u32 count)
{
while (count--)
outb(*vaddr++, io_addr);
}
+#define outw outw
static inline void outw(u16 value, u32 addr)
{
u32 n, byte_enables, data;
@@ -258,23 +261,27 @@ static inline void outw(u16 value, u32 addr)
ixp4xx_pci_write(addr, byte_enables | NP_CMD_IOWRITE, data);
}
+#define outsw outsw
static inline void outsw(u32 io_addr, const u16 *vaddr, u32 count)
{
while (count--)
outw(cpu_to_le16(*vaddr++), io_addr);
}
+#define outl outl
static inline void outl(u32 value, u32 addr)
{
ixp4xx_pci_write(addr, NP_CMD_IOWRITE, value);
}
+#define outsl outsl
static inline void outsl(u32 io_addr, const u32 *vaddr, u32 count)
{
while (count--)
outl(cpu_to_le32(*vaddr++), io_addr);
}
+#define inb inb
static inline u8 inb(u32 addr)
{
u32 n, byte_enables, data;
@@ -286,12 +293,14 @@ static inline u8 inb(u32 addr)
return data >> (8*n);
}
+#define insb insb
static inline void insb(u32 io_addr, u8 *vaddr, u32 count)
{
while (count--)
*vaddr++ = inb(io_addr);
}
+#define inw inw
static inline u16 inw(u32 addr)
{
u32 n, byte_enables, data;
@@ -303,12 +312,14 @@ static inline u16 inw(u32 addr)
return data>>(8*n);
}
+#define insw insw
static inline void insw(u32 io_addr, u16 *vaddr, u32 count)
{
while (count--)
*vaddr++ = le16_to_cpu(inw(io_addr));
}
+#define inl inl
static inline u32 inl(u32 addr)
{
u32 data;
@@ -318,6 +329,7 @@ static inline u32 inl(u32 addr)
return data;
}
+#define insl insl
static inline void insl(u32 io_addr, u32 *vaddr, u32 count)
{
while (count--)