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authorArjan van de Ven <arjan@linux.intel.com>2008-10-17 20:20:26 +0400
committerArjan van de Ven <arjan@linux.intel.com>2008-10-17 20:20:26 +0400
commit651dab4264e4ba0e563f5ff56f748127246e9065 (patch)
tree016630974bdcb00fe529b673f96d389e0fd6dc94 /arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h
parent40b8606253552109815786e5d4b0de98782d31f5 (diff)
parent2e532d68a2b3e2aa6b19731501222069735c741c (diff)
downloadlinux-651dab4264e4ba0e563f5ff56f748127246e9065.tar.xz
Merge commit 'linus/master' into merge-linus
Conflicts: arch/x86/kvm/i8254.c
Diffstat (limited to 'arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h')
-rw-r--r--arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h8
1 files changed, 1 insertions, 7 deletions
diff --git a/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h b/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h
index 19d80379a3e3..822f63f2f4a2 100644
--- a/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h
+++ b/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h
@@ -41,13 +41,7 @@
* Most of the registers are clumped in 4K regions spread throughout
* the 0xc0000000 -> 0xc0100000 address range, but we just map in
* the whole range using a single 1 MB section instead of small
- * 4K pages. This has two advantages for us:
- *
- * 1) We use only one TLB entry for large number of on-chip I/O devices.
- *
- * 2) We can easily set the Section attributes to XCB=101 on the IXP2400
- * as required per erratum #66. We accomplish this by using a
- * new MT_IXP2000_DEVICE memory type with the bits set as required.
+ * 4K pages.
*
* CAP stands for CSR Access Proxy.
*