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authorLinus Walleij <linus.walleij@linaro.org>2013-03-17 00:51:02 +0400
committerLinus Walleij <linus.walleij@linaro.org>2013-06-03 10:04:39 +0400
commita5ecbab7d9b606bdfbec67ccda0fde0f82e1e70e (patch)
tree7decba401fec83ec57759db7d069b41ff26cd981 /arch/arm/mach-integrator
parent207bcf45193bd6b847373246b37a3b673b1c81ca (diff)
downloadlinux-a5ecbab7d9b606bdfbec67ccda0fde0f82e1e70e.tar.xz
ARM: integrator: remap PCIv3 base dynamically
Remove the static mapping for the PCIv3 PCI bridge controller and do this dynamically when probing instead. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-integrator')
-rw-r--r--arch/arm/mach-integrator/include/mach/platform.h1
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c6
-rw-r--r--arch/arm/mach-integrator/pci_v3.c20
3 files changed, 14 insertions, 13 deletions
diff --git a/arch/arm/mach-integrator/include/mach/platform.h b/arch/arm/mach-integrator/include/mach/platform.h
index be5859efe10e..62fa119bc393 100644
--- a/arch/arm/mach-integrator/include/mach/platform.h
+++ b/arch/arm/mach-integrator/include/mach/platform.h
@@ -325,7 +325,6 @@
#define PCI_MEMORY_VADDR IOMEM(0xe8000000)
#define PCI_CONFIG_VADDR IOMEM(0xec000000)
-#define PCI_V3_VADDR IOMEM(0xed000000)
/* ------------------------------------------------------------------------
* Integrator Interrupt Controllers
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 0fff21cb4a81..8db3799e8ec6 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -80,7 +80,6 @@ void __iomem *ap_syscon_base;
* Logical Physical
* e8000000 40000000 PCI memory PHYS_PCI_MEM_BASE (max 512M)
* ec000000 61000000 PCI config space PHYS_PCI_CONFIG_BASE (max 16M)
- * ed000000 62000000 PCI V3 regs PHYS_PCI_V3_BASE (max 64k)
* fee00000 60000000 PCI IO PHYS_PCI_IO_BASE (max 16M)
* ef000000 Cache flush
* f1000000 10000000 Core module registers
@@ -140,11 +139,6 @@ static struct map_desc ap_io_desc[] __initdata __maybe_unused = {
.pfn = __phys_to_pfn(PHYS_PCI_CONFIG_BASE),
.length = SZ_16M,
.type = MT_DEVICE
- }, {
- .virtual = (unsigned long)PCI_V3_VADDR,
- .pfn = __phys_to_pfn(PHYS_PCI_V3_BASE),
- .length = SZ_64K,
- .type = MT_DEVICE
}
};
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index 604064b9d4ff..9dd7125e658f 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -260,15 +260,17 @@
* the mappings into PCI memory.
*/
+static void __iomem *pci_v3_base;
+
// V3 access routines
-#define v3_writeb(o,v) __raw_writeb(v, PCI_V3_VADDR + (unsigned int)(o))
-#define v3_readb(o) (__raw_readb(PCI_V3_VADDR + (unsigned int)(o)))
+#define v3_writeb(o,v) __raw_writeb(v, pci_v3_base + (unsigned int)(o))
+#define v3_readb(o) (__raw_readb(pci_v3_base + (unsigned int)(o)))
-#define v3_writew(o,v) __raw_writew(v, PCI_V3_VADDR + (unsigned int)(o))
-#define v3_readw(o) (__raw_readw(PCI_V3_VADDR + (unsigned int)(o)))
+#define v3_writew(o,v) __raw_writew(v, pci_v3_base + (unsigned int)(o))
+#define v3_readw(o) (__raw_readw(pci_v3_base + (unsigned int)(o)))
-#define v3_writel(o,v) __raw_writel(v, PCI_V3_VADDR + (unsigned int)(o))
-#define v3_readl(o) (__raw_readl(PCI_V3_VADDR + (unsigned int)(o)))
+#define v3_writel(o,v) __raw_writel(v, pci_v3_base + (unsigned int)(o))
+#define v3_readl(o) (__raw_readl(pci_v3_base + (unsigned int)(o)))
/*============================================================================
*
@@ -835,6 +837,12 @@ static int __init pci_v3_probe(struct platform_device *pdev)
return -ENODEV;
}
+ pci_v3_base = devm_ioremap(&pdev->dev, PHYS_PCI_V3_BASE, SZ_64K);
+ if (!pci_v3_base) {
+ dev_err(&pdev->dev, "unable to remap PCIv3 base\n");
+ return -ENODEV;
+ }
+
ret = devm_request_irq(&pdev->dev, IRQ_AP_V3INT, v3_irq, 0, "V3", NULL);
if (ret) {
dev_err(&pdev->dev, "unable to grab PCI error interrupt: %d\n",