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authorLinus Walleij <linus.walleij@linaro.org>2012-10-27 03:24:29 +0400
committerLinus Walleij <linus.walleij@linaro.org>2012-10-27 03:24:29 +0400
commitda72a66ba852fef3d5dfe02ab311a894e7d791e9 (patch)
tree4b37e0805f02e31490a76e53e9f60dbd293ebaba /arch/arm/mach-integrator/integrator_cp.c
parent3a6ca8c5c9e310d26fe090ac7c777c269661f0e6 (diff)
downloadlinux-da72a66ba852fef3d5dfe02ab311a894e7d791e9.tar.xz
ARM: integrator: get rid of preallocated irq descriptors
The Integrators were using the .nr_irqs field of the machine descriptor to pre-allocate a number of descriptors at boot. This is not right: the irq chip implementations should allocate their descriptors themselves, and as a result the simple irqdomain code warns about it. Get rid of this by just deleting the .nr_irq field from the machine descriptors but take care: doing so makes the default implementation hog the first 16 IRQ numbers, so these cannot be used by the still static IRQ number assignments in the ATAG boot case. So for these, bump the IRQ numbers to begin at 64 and upward. Introduce an offset to offset all IRQ numbers if need be, though we don't expect to do that again as device tree comes along. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-integrator/integrator_cp.c')
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index 5b08e8e4cc83..4423bc8e84c5 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -350,7 +350,6 @@ static const char * intcp_dt_board_compat[] = {
DT_MACHINE_START(INTEGRATOR_CP_DT, "ARM Integrator/CP (Device Tree)")
.reserve = integrator_reserve,
.map_io = intcp_map_io,
- .nr_irqs = NR_IRQS_INTEGRATOR_CP,
.init_early = intcp_init_early,
.init_irq = intcp_init_irq_of,
.handle_irq = fpga_handle_irq,
@@ -423,7 +422,7 @@ static void __init intcp_init_irq(void)
u32 pic_mask, cic_mask, sic_mask;
/* These masks are for the HW IRQ registers */
- pic_mask = ~((~0u) << (11 - IRQ_PIC_START));
+ pic_mask = ~((~0u) << (11 - 0));
pic_mask |= (~((~0u) << (29 - 22))) << 22;
cic_mask = ~((~0u) << (1 + IRQ_CIC_END - IRQ_CIC_START));
sic_mask = ~((~0u) << (1 + IRQ_SIC_END - IRQ_SIC_START));
@@ -504,7 +503,6 @@ MACHINE_START(CINTEGRATOR, "ARM-IntegratorCP")
.atag_offset = 0x100,
.reserve = integrator_reserve,
.map_io = intcp_map_io,
- .nr_irqs = NR_IRQS_INTEGRATOR_CP,
.init_early = intcp_init_early,
.init_irq = intcp_init_irq,
.handle_irq = fpga_handle_irq,