diff options
| author | Oleksij Rempel <o.rempel@pengutronix.de> | 2021-05-11 07:37:33 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2021-05-23 06:32:46 +0300 |
| commit | 582368377926be5c31660167f40f21d8d6805fd4 (patch) | |
| tree | 635c2cf75defe27421c0ed635d7e4fed7034692e /arch/arm/mach-imx | |
| parent | f5d9aa79dfdfed50b9179061b6daeb3971021361 (diff) | |
| download | linux-582368377926be5c31660167f40f21d8d6805fd4.tar.xz | |
ARM: imx6q: remove Atheros AR8035 SmartEEE fixup
This fixup removes the Lpi_en bit.
If this patch breaks functionality of your board, use following device
tree properties: qca,smarteee-tw-us-1g and qca,smarteee-tw-us-100m.
For example:
ethernet-phy@X {
reg = <0xX>;
qca,smarteee-tw-us-1g = <24>;
....
};
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/mach-imx')
| -rw-r--r-- | arch/arm/mach-imx/mach-imx6q.c | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index d12b571a61ac..c9d7c29d95e1 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -68,32 +68,11 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, ventana_pciesw_early_fixup); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, ventana_pciesw_early_fixup); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, ventana_pciesw_early_fixup); -static int ar8035_phy_fixup(struct phy_device *dev) -{ - u16 val; - - /* Ar803x phy SmartEEE feature cause link status generates glitch, - * which cause ethernet link down/up issue, so disable SmartEEE - */ - phy_write(dev, 0xd, 0x3); - phy_write(dev, 0xe, 0x805d); - phy_write(dev, 0xd, 0x4003); - - val = phy_read(dev, 0xe); - phy_write(dev, 0xe, val & ~(1 << 8)); - - return 0; -} - -#define PHY_ID_AR8035 0x004dd072 - static void __init imx6q_enet_phy_init(void) { if (IS_BUILTIN(CONFIG_PHYLIB)) { phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, ksz9021rn_phy_fixup); - phy_register_fixup_for_uid(PHY_ID_AR8035, 0xffffffef, - ar8035_phy_fixup); } } |