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authorFabio Estevam <fabio.estevam@freescale.com>2014-01-07 14:00:40 +0400
committerShawn Guo <shawn.guo@linaro.org>2014-03-05 06:34:59 +0400
commitfa6be65ed4d65ca7e56a878d247ed963a3619c0e (patch)
treefd9a5b1715952569d050326ad0f36292399bff9e /arch/arm/mach-imx/pm-imx6q.c
parentc0bea59ca58e30fb8fd29254569bdaae482398ad (diff)
downloadlinux-fa6be65ed4d65ca7e56a878d247ed963a3619c0e.tar.xz
ARM: imx: Use INT_MEM_CLK_LPM as the bit name
Bit 17 of register CCM_CGPR is called INT_MEM_CLK_LPM as per the mx6 reference manual, so use this name instead. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx/pm-imx6q.c')
-rw-r--r--arch/arm/mach-imx/pm-imx6q.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c
index 7a9b98589db7..30af3c0e1bf3 100644
--- a/arch/arm/mach-imx/pm-imx6q.c
+++ b/arch/arm/mach-imx/pm-imx6q.c
@@ -56,15 +56,15 @@
#define BM_CLPCR_MASK_L2CC_IDLE (0x1 << 27)
#define CGPR 0x64
-#define BM_CGPR_CHICKEN_BIT (0x1 << 17)
+#define BM_CGPR_INT_MEM_CLK_LPM (0x1 << 17)
static void __iomem *ccm_base;
-void imx6q_set_chicken_bit(void)
+void imx6q_set_int_mem_clk_lpm(void)
{
u32 val = readl_relaxed(ccm_base + CGPR);
- val |= BM_CGPR_CHICKEN_BIT;
+ val |= BM_CGPR_INT_MEM_CLK_LPM;
writel_relaxed(val, ccm_base + CGPR);
}