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authorAnson Huang <b20788@freescale.com>2015-08-04 20:48:37 +0300
committerShawn Guo <shawnguo@kernel.org>2015-09-17 03:54:35 +0300
commitee4a5f838c8437484c9387e9ef9256332f07f3dd (patch)
tree29ae88eb6027eddaeaa6f036a0dc98f66281ac6f /arch/arm/mach-imx/mach-imx6ul.c
parent6ff33f3902c3b1c5d0db6b1e2c70b6d76fba357f (diff)
downloadlinux-ee4a5f838c8437484c9387e9ef9256332f07f3dd.tar.xz
ARM: imx: add suspend/resume support for i.mx6ul
This patch adds suspend function for i.MX6UL, it supports "standby" and "mem" mode, for "standby" mode, SoC will enter STOP mode only, while for "mem" mode, SoC will enter STOP mode and DDR IO will be set to low power mode. As i.MX6UL contains a "Cortex-A7" ARM core which has no PL310, so we need to avoid any PL310 operations during suspend/resume, also, we need to flush Cortex-A7's inernal L2 cache before suspend. Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/mach-imx6ul.c')
-rw-r--r--arch/arm/mach-imx/mach-imx6ul.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mach-imx6ul.c b/arch/arm/mach-imx/mach-imx6ul.c
index 1b97fe133cef..be832b98b7e5 100644
--- a/arch/arm/mach-imx/mach-imx6ul.c
+++ b/arch/arm/mach-imx/mach-imx6ul.c
@@ -67,6 +67,7 @@ static void __init imx6ul_init_machine(void)
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
imx6ul_enet_init();
imx_anatop_init();
+ imx6ul_pm_init();
}
static void __init imx6ul_init_irq(void)
@@ -74,6 +75,7 @@ static void __init imx6ul_init_irq(void)
imx_init_revision_from_anatop();
imx_src_init();
irqchip_init();
+ imx6_pm_ccm_init("fsl,imx6ul-ccm");
}
static const char *imx6ul_dt_compat[] __initconst = {