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authorMatija Glavinic Pecotic <matija.glavinic-pecotic.ext@nokia.com>2016-06-07 18:19:16 +0300
committerRussell King <rmk+kernel@armlinux.org.uk>2016-07-02 14:13:03 +0300
commitf6492164ecb19d43687875fdb456845acc504590 (patch)
tree3b7ecd2d644fa3c8af8c50b84eb5203bd5016c7b /arch/arm/mach-imx/iomux-v1.c
parent56530f5d2ddc9b9fade7ef8db9cb886e9dc689b5 (diff)
downloadlinux-f6492164ecb19d43687875fdb456845acc504590.tar.xz
ARM: 8577/1: Fix Cortex-A15 798181 errata initialization
Current errata initialization doesn't take properly revision and REVIDR into account. Depending on the core revision, revidr bits should not be taken into account. Errata misleadingly declares r3p3 to be error-free, but this is not the case. Include rp3p3 in errata initialization. Here are possible fixes defined in revidr register for r2 and r3 [1,2]: r0p0-r2p1: No fixes applied r2p2,r2p3: REVIDR[4]: 798181 Moving a virtual page that is being accessed by an active process can lead to unexpected behavior REVIDR[9]: Not defined r2p4,r3p0,r3p1,r3p2: REVIDR[4]: 798181 Moving a virtual page that is being accessed by an active process can lead to unexpected behavior REVIDR[9]: 798181 Moving a virtual page that is being accessed by an active process can lead to unexpected behavior - This is an update to a previously released ECO. r3p3: REVIDR[4]: Reserved REVIDR[9]: 798181 Moving a virtual page that is being accessed by an active process can lead to unexpected behavior - This is an update to a previously released ECO. And here is proposed handling from the same document: * In r3p2 and earlier versions with REVIDR[4]= 0,the full workaround is required. * In r3p2 and earlier versions with REVIDR[4]=1, REVIDR[9]=0, only the portion of the workaround up to the end of step 6 is required. * In r3p2 and earlier versions with REVIDR[4]=1, REVIDR[9]=1, no workaround is required. * In r3p3, if REVIDR[9]=0, only the portion of the workaround up to the end of step 6 is required. * In r3p3, if REVIDR[9]=1, no workaround is required. These imply following: REVIDR[9] set -> No WA REVIDR[4] set, REVIDR[9] cleared -> Partial WA Both cleared -> Full WA Where certain bits should and should not be taken into account depending on whether they are defined for the revision. Although not explicitly mentioned in the errata note, REVIDR[9] set, with REVIDR[4] cleared is valid combination which requires no WA. This is confirmed by ARM support and errata will be updated. [1] ARM CortexTM-A15 MPCore - NEON Product revision r3 Software Developers Errata Notice ARM-EPM-028093 v20.0 Released [2] ARM CortexTM-A15 MPCore - NEON Product Revision r2 Software Developers Errata Notice ARM-EPM-028090 v19.3 Released Signed-off-by: Matija Glavinic Pecotic <matija.glavinic-pecotic.ext@nokia.com> Reviewed-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-imx/iomux-v1.c')
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