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authorFabio Estevam <fabio.estevam@freescale.com>2013-01-22 16:40:55 +0400
committerShawn Guo <shawn.guo@linaro.org>2013-01-29 10:05:43 +0400
commit7356420cd34e40fe27bf26555b0bf3f2849a43dd (patch)
treebd747993fe7943d0f28578e371f426e4f6227ad3 /arch/arm/mach-imx/cpu-imx5.c
parentd0ab36c94d397fd203d07e2c46b41543d65276b8 (diff)
downloadlinux-7356420cd34e40fe27bf26555b0bf3f2849a43dd.tar.xz
ARM: imx: Remove mx508 support
Only mx508 based board is mach-mx50_rdp and it has been marked as BROKEN for several releases. mx508 currently lacks clock support. In case someone needs to add mx508 support back, then the recommended approach is to use device tree. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx/cpu-imx5.c')
-rw-r--r--arch/arm/mach-imx/cpu-imx5.c39
1 files changed, 0 insertions, 39 deletions
diff --git a/arch/arm/mach-imx/cpu-imx5.c b/arch/arm/mach-imx/cpu-imx5.c
index d88760014ff9..d7ce72252a4e 100644
--- a/arch/arm/mach-imx/cpu-imx5.c
+++ b/arch/arm/mach-imx/cpu-imx5.c
@@ -22,7 +22,6 @@
static int mx5_cpu_rev = -1;
#define IIM_SREV 0x24
-#define MX50_HW_ADADIG_DIGPROG 0xB0
static int get_mx51_srev(void)
{
@@ -108,41 +107,3 @@ int mx53_revision(void)
return mx5_cpu_rev;
}
EXPORT_SYMBOL(mx53_revision);
-
-static int get_mx50_srev(void)
-{
- void __iomem *anatop = ioremap(MX50_ANATOP_BASE_ADDR, SZ_8K);
- u32 rev;
-
- if (!anatop) {
- mx5_cpu_rev = -EINVAL;
- return 0;
- }
-
- rev = readl(anatop + MX50_HW_ADADIG_DIGPROG);
- rev &= 0xff;
-
- iounmap(anatop);
- if (rev == 0x0)
- return IMX_CHIP_REVISION_1_0;
- else if (rev == 0x1)
- return IMX_CHIP_REVISION_1_1;
- return 0;
-}
-
-/*
- * Returns:
- * the silicon revision of the cpu
- * -EINVAL - not a mx50
- */
-int mx50_revision(void)
-{
- if (!cpu_is_mx50())
- return -EINVAL;
-
- if (mx5_cpu_rev == -1)
- mx5_cpu_rev = get_mx50_srev();
-
- return mx5_cpu_rev;
-}
-EXPORT_SYMBOL(mx50_revision);