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| author | Arnd Bergmann <arnd@arndb.de> | 2011-11-01 20:12:22 +0400 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2011-11-01 20:12:22 +0400 |
| commit | c72dbae971400e466ad9ff16c920cd6d9d8c55a1 (patch) | |
| tree | 7a0ebba8b14d889a8b42edfa1272be222b908a82 /arch/arm/mach-imx/clock-imx25.c | |
| parent | 7e1efcf5d2039fb7a91e21df32f4175dbca4d61c (diff) | |
| parent | b4cbb8a4e602ea77b0525d06eff89c6a6070dab3 (diff) | |
| download | linux-c72dbae971400e466ad9ff16c920cd6d9d8c55a1.tar.xz | |
Merge branch 'imx/devel' into next/dt
The board changes in the imx/devel branch conflict with other changes in
the device imx/dt branch.
Conflicts:
arch/arm/mach-mx5/board-mx53_loco.c
arch/arm/mach-mx5/board-mx53_smd.c
arch/arm/plat-mxc/include/mach/common.h
arch/arm/plat-mxc/include/mach/memory.h
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-imx/clock-imx25.c')
| -rw-r--r-- | arch/arm/mach-imx/clock-imx25.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clock-imx25.c b/arch/arm/mach-imx/clock-imx25.c index e63e23504fe5..b0fec74c8c91 100644 --- a/arch/arm/mach-imx/clock-imx25.c +++ b/arch/arm/mach-imx/clock-imx25.c @@ -263,6 +263,7 @@ DEFINE_CLOCK(audmux_clk, 0, CCM_CGCR1, 0, NULL, NULL, NULL); DEFINE_CLOCK(csi_clk, 0, CCM_CGCR1, 4, get_rate_csi, NULL, &csi_per_clk); DEFINE_CLOCK(can1_clk, 0, CCM_CGCR1, 2, get_rate_ipg, NULL, NULL); DEFINE_CLOCK(can2_clk, 1, CCM_CGCR1, 3, get_rate_ipg, NULL, NULL); +DEFINE_CLOCK(iim_clk, 0, CCM_CGCR1, 26, NULL, NULL, NULL); #define _REGISTER_CLOCK(d, n, c) \ { \ @@ -310,6 +311,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("flexcan.1", NULL, can2_clk) /* i.mx25 has the i.mx35 type sdma */ _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk) + _REGISTER_CLOCK(NULL, "iim", iim_clk) }; int __init mx25_clocks_init(void) @@ -334,6 +336,10 @@ int __init mx25_clocks_init(void) /* Clock source for gpt is ahb_div */ __raw_writel(__raw_readl(CRM_BASE+0x64) & ~(1 << 5), CRM_BASE + 0x64); + clk_enable(&iim_clk); + imx_print_silicon_rev("i.MX25", mx25_revision()); + clk_disable(&iim_clk); + mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); return 0; |