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| author | James Morris <james.l.morris@oracle.com> | 2012-09-28 07:37:32 +0400 |
|---|---|---|
| committer | James Morris <james.l.morris@oracle.com> | 2012-09-28 07:37:32 +0400 |
| commit | bf5308344527d015ac9a6d2bda4ad4d40fd7d943 (patch) | |
| tree | 566e61e2cfc648c374d15cfc8c661b73e1a471f8 /arch/arm/mach-imx/clk-imx25.c | |
| parent | 3585e96cd1049682b8a19a0b699422156e9d735b (diff) | |
| parent | 979570e02981d4a8fc20b3cc8fd651856c98ee9d (diff) | |
| download | linux-bf5308344527d015ac9a6d2bda4ad4d40fd7d943.tar.xz | |
Merge tag 'v3.6-rc7' into next
Linux 3.6-rc7
Requested by David Howells so he can merge his key susbsystem work into
my tree with requisite -linus changesets.
Diffstat (limited to 'arch/arm/mach-imx/clk-imx25.c')
| -rw-r--r-- | arch/arm/mach-imx/clk-imx25.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c index fdd8cc87c9fe..d20d4795f4ea 100644 --- a/arch/arm/mach-imx/clk-imx25.c +++ b/arch/arm/mach-imx/clk-imx25.c @@ -222,10 +222,8 @@ int __init mx25_clocks_init(void) clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0"); clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0"); clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0"); - clk_register_clkdev(clk[ssi1_ipg_per], "per", "imx-ssi.0"); - clk_register_clkdev(clk[ssi1_ipg], "ipg", "imx-ssi.0"); - clk_register_clkdev(clk[ssi2_ipg_per], "per", "imx-ssi.1"); - clk_register_clkdev(clk[ssi2_ipg], "ipg", "imx-ssi.1"); + clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0"); + clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1"); clk_register_clkdev(clk[esdhc1_ipg_per], "per", "sdhci-esdhc-imx25.0"); clk_register_clkdev(clk[esdhc1_ipg], "ipg", "sdhci-esdhc-imx25.0"); clk_register_clkdev(clk[esdhc1_ahb], "ahb", "sdhci-esdhc-imx25.0"); @@ -243,6 +241,6 @@ int __init mx25_clocks_init(void) clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma"); clk_register_clkdev(clk[iim_ipg], "iim", NULL); - mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); + mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1); return 0; } |