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author | afzal mohammed <afzal.mohd.ma@gmail.com> | 2020-03-12 16:51:23 +0300 |
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committer | Russell King <rmk+kernel@armlinux.org.uk> | 2020-03-19 12:27:40 +0300 |
commit | 5926e7e1668be9f8179dbee34b5dca1f0f6a605b (patch) | |
tree | e52ff99f7d29b6f217709010f916645d083fb17c /arch/arm/mach-footbridge/dc21285-timer.c | |
parent | c51dc14ee68a09668f7f489f62decfcde5865de4 (diff) | |
download | linux-5926e7e1668be9f8179dbee34b5dca1f0f6a605b.tar.xz |
ARM: 8965/2: footbridge: replace setup_irq() by request_irq()
request_irq() is preferred over setup_irq(). Invocations of setup_irq()
occur after memory allocators are ready.
Per tglx[1], setup_irq() existed in olden days when allocators were not
ready by the time early interrupts were initialized.
Hence replace setup_irq() by request_irq().
[1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos
Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'arch/arm/mach-footbridge/dc21285-timer.c')
-rw-r--r-- | arch/arm/mach-footbridge/dc21285-timer.c | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c index f76212d2dbf1..2908c9ef3c9b 100644 --- a/arch/arm/mach-footbridge/dc21285-timer.c +++ b/arch/arm/mach-footbridge/dc21285-timer.c @@ -101,13 +101,6 @@ static irqreturn_t timer1_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static struct irqaction footbridge_timer_irq = { - .name = "dc21285_timer1", - .handler = timer1_interrupt, - .flags = IRQF_TIMER | IRQF_IRQPOLL, - .dev_id = &ckevt_dc21285, -}; - /* * Set up timer interrupt. */ @@ -118,7 +111,9 @@ void __init footbridge_timer_init(void) clocksource_register_hz(&cksrc_dc21285, rate); - setup_irq(ce->irq, &footbridge_timer_irq); + if (request_irq(ce->irq, timer1_interrupt, IRQF_TIMER | IRQF_IRQPOLL, + "dc21285_timer1", &ckevt_dc21285)) + pr_err("Failed to request irq %d (dc21285_timer1)", ce->irq); ce->cpumask = cpumask_of(smp_processor_id()); clockevents_config_and_register(ce, rate, 0x4, 0xffffff); |