diff options
| author | Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> | 2014-09-25 12:59:41 +0400 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2014-10-20 19:06:36 +0400 |
| commit | a135e20185fe6f0258fa6837455043f3063601d8 (patch) | |
| tree | 001820cdbf32025e4bb147cdf3e048fb24cc75df /arch/arm/mach-exynos/pm.c | |
| parent | 0b7778a801fde0eacd5ee08242290273507e60a2 (diff) | |
| download | linux-a135e20185fe6f0258fa6837455043f3063601d8.tar.xz | |
ARM: EXYNOS: add secure firmware support to AFTR mode code
* Move cp15 registers saving to exynos_save_cp15() helper and add
additional helper usage to do_idle firmware method.
* Use resume firmware method instead of exynos_cpu_restore_register()
and skip exynos_cpu_save_register() on boards with secure firmware
enabled.
* Use sysram_ns_base_addr + 0x24/0x20 addresses instead of the default
ones used by exynos_cpu_set_boot_vector() on boards with secure
firmware enabled.
* Use do_idle firmware method instead of cpu_do_idle() on boards with
secure firmware enabled.
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/pm.c')
| -rw-r--r-- | arch/arm/mach-exynos/pm.c | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 3407fc162449..6796fce923e2 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -236,11 +236,19 @@ static void exynos_cpu_set_boot_vector(long flags) static int exynos_aftr_finisher(unsigned long flags) { + int ret; + exynos_set_wakeupmask(0x0000ff3e); - exynos_cpu_set_boot_vector(S5P_CHECK_AFTR); /* Set value of power down register for aftr mode */ exynos_sys_powerdown_conf(SYS_AFTR); - cpu_do_idle(); + + ret = call_firmware_op(do_idle, FW_DO_IDLE_AFTR); + if (ret == -ENOSYS) { + if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) + exynos_cpu_save_register(); + exynos_cpu_set_boot_vector(S5P_CHECK_AFTR); + cpu_do_idle(); + } return 1; } @@ -250,14 +258,13 @@ void exynos_enter_aftr(void) cpu_pm_enter(); exynos_pm_central_suspend(); - if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) - exynos_cpu_save_register(); cpu_suspend(0, exynos_aftr_finisher); if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) { scu_enable(S5P_VA_SCU); - exynos_cpu_restore_register(); + if (call_firmware_op(resume) == -ENOSYS) + exynos_cpu_restore_register(); } exynos_pm_central_resume(); |