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| author | Arnd Bergmann <arnd@arndb.de> | 2012-05-16 17:53:24 +0400 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-05-16 17:53:24 +0400 |
| commit | 6d49d53552b60be2caaa853c814662bc4e24428e (patch) | |
| tree | 0cb814af7646e30022d8024fcbf7d8cacdb98f5b /arch/arm/mach-exynos/include/mach/regs-clock.h | |
| parent | a551204badbea5119a84ee4f03faefce9f2c0543 (diff) | |
| parent | 380c3a545f7de096c0f84344ba70ea4cfd1a059f (diff) | |
| download | linux-6d49d53552b60be2caaa853c814662bc4e24428e.tar.xz | |
Merge branch 'next/devel-exynos5250-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc2
* 'next/devel-exynos5250-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Add AUXDATA for i2c controllers
ARM: dts: Update device tree source files for EXYNOS5250
ARM: EXYNOS: Add device tree support for interrupt combiner
ARM: EXYNOS: Add irq_domain support for interrupt combiner
ARM: EXYNOS: Remove a new bus_type instance for EXYNOS5
ARM: EXYNOS: update irqs for EXYNOS5250 SoC
ARM: EXYNOS: Add pre-divider and fout mux clocks for bpll and mpll
ARM: EXYNOS: add GPC4 bank instance
ARM: EXYNOS: Redefine IRQ_MCT_L0,1 definition
ARM: EXYNOS: Modify the GIC physical address for static io-mapping
ARM: EXYNOS: Add watchdog timer clock instance
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-exynos/include/mach/regs-clock.h')
| -rw-r--r-- | arch/arm/mach-exynos/include/mach/regs-clock.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h index dba83e91f0fd..b78b5f3ad9c0 100644 --- a/arch/arm/mach-exynos/include/mach/regs-clock.h +++ b/arch/arm/mach-exynos/include/mach/regs-clock.h @@ -322,6 +322,8 @@ #define EXYNOS5_CLKSRC_CDREX EXYNOS_CLKREG(0x20200) #define EXYNOS5_CLKDIV_CDREX EXYNOS_CLKREG(0x20500) +#define EXYNOS5_PLL_DIV2_SEL EXYNOS_CLKREG(0x20A24) + #define EXYNOS5_EPLL_LOCK EXYNOS_CLKREG(0x10030) #define EXYNOS5_EPLLCON0_LOCKED_SHIFT (29) |