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authorOlof Johansson <olof@lixom.net>2014-07-13 08:19:21 +0400
committerOlof Johansson <olof@lixom.net>2014-07-13 08:19:21 +0400
commitcacadb4ff969a82628d47db87b5a531be466b134 (patch)
treeb006cfae86bd141db07ba212b6d6d4b81f3e51a9 /arch/arm/mach-exynos/exynos.c
parent363d4ddc17320ad0906778924d40ba5955ccf194 (diff)
parentbed7118988ef48063c72f67cc2701c72663b3870 (diff)
downloadlinux-cacadb4ff969a82628d47db87b5a531be466b134.tar.xz
Merge tag 'samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
Merge "Samsung fixes-3 for 3.16" from Kukjin Kim: Samsung fixes-3 for v3.16 - update the parent for Auudss clock because kernel will be hang during late boot if the parent clock is disabled in bootloader. - enable clk handing in power domain because while power domain on/off, its regarding clock source will be reset and it causes a problem so need to handle it. - add mux clocks to be used by power domain for exynos5420-mfc during power domain on/off and property in device tree also. - register cpuidle only for exynos4210 and exynos5250 because a system failure will be happened on other exynos SoCs. * tag 'samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Register cpuidle device only on exynos4210 and 5250 ARM: dts: Add clock property for mfc_pd in exynos5420 clk: exynos5420: Add IDs for clocks used in PD mfc ARM: EXYNOS: Add support for clock handling in power domain ARM: dts: Update the parent for Audss clocks in Exynos5420 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-exynos/exynos.c')
-rw-r--r--arch/arm/mach-exynos/exynos.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 95cad252eb1b..46d893fcbe85 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -173,10 +173,8 @@ static struct platform_device exynos_cpuidle = {
void __init exynos_cpuidle_init(void)
{
- if (soc_is_exynos5440())
- return;
-
- platform_device_register(&exynos_cpuidle);
+ if (soc_is_exynos4210() || soc_is_exynos5250())
+ platform_device_register(&exynos_cpuidle);
}
void __init exynos_cpufreq_init(void)