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authorAndrew Lunn <andrew@lunn.ch>2011-12-08 00:48:06 +0400
committerNicolas Pitre <nico@fluxnic.net>2011-12-14 03:46:55 +0400
commit45173d5ed4c9a397db31623bf6469efbd3a239cd (patch)
treed4efe8af8c7b23ed2a97d2686a88037ea6bc7758 /arch/arm/mach-dove/addr-map.c
parentb6d1c33a31deb1784c1d34070db6e84fd6f9d870 (diff)
downloadlinux-45173d5ed4c9a397db31623bf6469efbd3a239cd.tar.xz
ARM: Orion: mbus_dram_info consolidation
Move the *_mbus_dram_info structure into the orion platform and call it orion_mbus_dram_info everywhere. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Michael Walle <michael@walle.cc> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
Diffstat (limited to 'arch/arm/mach-dove/addr-map.c')
-rw-r--r--arch/arm/mach-dove/addr-map.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/arm/mach-dove/addr-map.c b/arch/arm/mach-dove/addr-map.c
index 1584726088e4..98b8c83b09ab 100644
--- a/arch/arm/mach-dove/addr-map.c
+++ b/arch/arm/mach-dove/addr-map.c
@@ -35,8 +35,6 @@
#define ATTR_PCIE_MEM 0xe8
#define ATTR_SCRATCHPAD 0x0
-struct mbus_dram_target_info dove_mbus_dram_info;
-
static inline void __iomem *ddr_map_sc(int i)
{
return (void __iomem *)(DOVE_MC_VIRT_BASE + 0x100 + ((i) << 4));
@@ -102,7 +100,7 @@ void __init dove_setup_cpu_mbus(void)
/*
* Setup MBUS dram target info.
*/
- dove_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
+ orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR;
for (i = 0, cs = 0; i < 2; i++) {
u32 map = readl(ddr_map_sc(i));
@@ -113,7 +111,7 @@ void __init dove_setup_cpu_mbus(void)
if (map & 1) {
struct mbus_dram_window *w;
- w = &dove_mbus_dram_info.cs[cs++];
+ w = &orion_mbus_dram_info.cs[cs++];
w->cs_index = i;
w->mbus_attr = 0; /* CS address decoding done inside */
/* the DDR controller, no need to */
@@ -122,5 +120,5 @@ void __init dove_setup_cpu_mbus(void)
w->size = 0x100000 << (((map & 0x000f0000) >> 16) - 4);
}
}
- dove_mbus_dram_info.num_cs = cs;
+ orion_mbus_dram_info.num_cs = cs;
}