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authorLinus Torvalds <torvalds@linux-foundation.org>2013-09-07 00:30:06 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-09-07 00:30:06 +0400
commitb4b50fd78b1e31989940dfc647e64453d0f7176a (patch)
tree1a55f110e021c02963b63759f3f18ea7ba3aa228 /arch/arm/mach-davinci/serial.c
parentdccfd1e439c11422d7aca0d834b0430d24650e85 (diff)
parentf97c43bbdf8a1ea42477b1a804a48e7e368cb13c (diff)
downloadlinux-b4b50fd78b1e31989940dfc647e64453d0f7176a.tar.xz
Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform changes from Olof Johansson: "This branch contains mostly additions and changes to platform enablement and SoC-level drivers. Since there's sometimes a dependency on device-tree changes, there's also a fair amount of those in this branch. Pieces worth mentioning are: - Mbus driver for Marvell platforms, allowing kernel configuration and resource allocation of on-chip peripherals. - Enablement of the mbus infrastructure from Marvell PCI-e drivers. - Preparation of MSI support for Marvell platforms. - Addition of new PCI-e host controller driver for Tegra platforms - Some churn caused by sharing of macro names between i.MX 6Q and 6DL platforms in the device tree sources and header files. - Various suspend/PM updates for Tegra, including LP1 support. - Versatile Express support for MCPM, part of big little support. - Allwinner platform support for A20 and A31 SoCs (dual and quad Cortex-A7) - OMAP2+ support for DRA7, a new Cortex-A15-based SoC. The code that touches other architectures are patches moving MSI arch-specific functions over to weak symbols and removal of ARCH_SUPPORTS_MSI, acked by PCI maintainers" * tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (266 commits) tegra-cpuidle: provide stub when !CONFIG_CPU_IDLE PCI: tegra: replace devm_request_and_ioremap by devm_ioremap_resource ARM: tegra: Drop ARCH_SUPPORTS_MSI and sort list ARM: dts: vf610-twr: enable i2c0 device ARM: dts: i.MX51: Add one more I2C2 pinmux entry ARM: dts: i.MX51: Move pins configuration under "iomuxc" label ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator ARM: dts: imx27-phytec-phycore-som: Enable AUDMUX ARM: dts: i.MX27: Disable AUDMUX in the template ARM: dts: wandboard: Add support for SDIO bcm4329 ARM: i.MX5 clocks: Remove optional clock setup (CKIH1) from i.MX51 template ARM: dts: imx53-qsb: Make USBH1 functional ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module ARM: dts: imx6qdl-sabresd: Add touchscreen support ARM: imx: add ocram clock for imx53 ARM: dts: imx: ocram size is different between imx6q and imx6dl ARM: dts: imx27-phytec-phycore-som: Fix regulator settings ARM: dts: i.MX27: Remove clock name from CPU node ...
Diffstat (limited to 'arch/arm/mach-davinci/serial.c')
-rw-r--r--arch/arm/mach-davinci/serial.c54
1 files changed, 20 insertions, 34 deletions
diff --git a/arch/arm/mach-davinci/serial.c b/arch/arm/mach-davinci/serial.c
index f2625814c3c9..5e93a734c858 100644
--- a/arch/arm/mach-davinci/serial.c
+++ b/arch/arm/mach-davinci/serial.c
@@ -70,49 +70,36 @@ static void __init davinci_serial_reset(struct plat_serial8250_port *p)
UART_DM646X_SCR_TX_WATERMARK);
}
-/* Enable UART clock and obtain its rate */
-int __init davinci_serial_setup_clk(unsigned instance, unsigned int *rate)
+int __init davinci_serial_init(struct platform_device *serial_dev)
{
- char name[16];
+ int i, ret = 0;
+ struct device *dev;
+ struct plat_serial8250_port *p;
struct clk *clk;
- struct davinci_soc_info *soc_info = &davinci_soc_info;
- struct device *dev = &soc_info->serial_dev->dev;
-
- sprintf(name, "uart%d", instance);
- clk = clk_get(dev, name);
- if (IS_ERR(clk)) {
- pr_err("%s:%d: failed to get UART%d clock\n",
- __func__, __LINE__, instance);
- return PTR_ERR(clk);
- }
-
- clk_prepare_enable(clk);
-
- if (rate)
- *rate = clk_get_rate(clk);
-
- return 0;
-}
-
-int __init davinci_serial_init(struct davinci_uart_config *info)
-{
- int i, ret;
- struct davinci_soc_info *soc_info = &davinci_soc_info;
- struct device *dev = &soc_info->serial_dev->dev;
- struct plat_serial8250_port *p = dev->platform_data;
/*
* Make sure the serial ports are muxed on at this point.
* You have to mux them off in device drivers later on if not needed.
*/
- for (i = 0; p->flags; i++, p++) {
- if (!(info->enabled_uarts & (1 << i)))
- continue;
+ for (i = 0; serial_dev[i].dev.platform_data != NULL; i++) {
+ dev = &serial_dev[i].dev;
+ p = dev->platform_data;
- ret = davinci_serial_setup_clk(i, &p->uartclk);
+ ret = platform_device_register(&serial_dev[i]);
if (ret)
continue;
+ clk = clk_get(dev, NULL);
+ if (IS_ERR(clk)) {
+ pr_err("%s:%d: failed to get UART%d clock\n",
+ __func__, __LINE__, i);
+ continue;
+ }
+
+ clk_prepare_enable(clk);
+
+ p->uartclk = clk_get_rate(clk);
+
if (!p->membase && p->mapbase) {
p->membase = ioremap(p->mapbase, SZ_4K);
@@ -125,6 +112,5 @@ int __init davinci_serial_init(struct davinci_uart_config *info)
if (p->membase && p->type != PORT_AR7)
davinci_serial_reset(p);
}
-
- return platform_device_register(soc_info->serial_dev);
+ return ret;
}