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authorLinus Torvalds <torvalds@linux-foundation.org>2010-05-19 23:08:50 +0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-05-19 23:08:50 +0400
commit024a6b95181f2df6090975c8a293499d24bf8b28 (patch)
tree8da0a465bc35ab250897fb6bea1bcb64cdef9a05 /arch/arm/mach-davinci/clock.h
parent349e1fba7e63b1067b5915337986060c13d9edd0 (diff)
parent5e682ef825302f2378726e44257291eaeadbfd50 (diff)
downloadlinux-024a6b95181f2df6090975c8a293499d24bf8b28.tar.xz
Merge branch 'davinci-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci
* 'davinci-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci: (48 commits) Revert "rtc: omap: let device wakeup capability be configured from chip init logic" DM365: Added more PINMUX configurations for AEMIF DM365: Make CLKOUTx available DM365: Added PINMUX definitions for GPIO30..32 Davinci: iotable based ioremap() interception Davinci: pinmux - use ioremap() Davinci: aintc/cpintc - use ioremap() Davinci: psc - use ioremap() Davinci: timer - use ioremap() Davinci: jtag_id - use ioremap() Davinci: da8xx: rtc - use ioremap Davinci: gpio - use ioremap() davinci: edma: fix coding style issue related to breaking lines davinci: edma: use BIT() wherever possible davinci: edma: fix coding style issue related to usage of braces davinci: edma: use a more intuitive name for edma_info Davinci: serial - conditional reset via pwremu Davinci: serial - use ioremap() Davinci: serial - remove unnecessary define Davinci: watchdog reset separation across socs ... Fix up trivial conflict in arch/arm/Kconfig due to removal of "select GENERIC_TIME"
Diffstat (limited to 'arch/arm/mach-davinci/clock.h')
-rw-r--r--arch/arm/mach-davinci/clock.h9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index aa0a61150325..01e36483ac3d 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -76,6 +76,7 @@ struct pll_data {
u32 num;
u32 flags;
u32 input_rate;
+ u32 div_ratio_mask;
};
#define PLL_HAS_PREDIV 0x01
#define PLL_HAS_POSTDIV 0x02
@@ -101,10 +102,11 @@ struct clk {
/* Clock flags: SoC-specific flags start at BIT(16) */
#define ALWAYS_ENABLED BIT(1)
-#define CLK_PSC BIT(2)
-#define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */
+#define CLK_PSC BIT(2)
+#define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */
#define CLK_PLL BIT(4) /* PLL-derived clock */
-#define PRE_PLL BIT(5) /* source is before PLL mult/div */
+#define PRE_PLL BIT(5) /* source is before PLL mult/div */
+#define PSC_SWRSTDISABLE BIT(6) /* Disable state is SwRstDisable */
#define CLK(dev, con, ck) \
{ \
@@ -118,6 +120,7 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
unsigned int mult, unsigned int postdiv);
extern struct platform_device davinci_wdt_device;
+extern void davinci_watchdog_reset(struct platform_device *);
#endif