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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2012-03-02 16:54:37 +0400 |
|---|---|---|
| committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2012-03-15 19:37:56 +0400 |
| commit | a7776ec625c8ca90d050953946a5b72eaf41c21c (patch) | |
| tree | cc2717698bc80e5511b06fa83936f0fd9617aa9c /arch/arm/mach-at91/at91sam9x5.c | |
| parent | c8082d344ac4c05932fec1766e5e9ce72cf286ed (diff) | |
| download | linux-a7776ec625c8ca90d050953946a5b72eaf41c21c.tar.xz | |
ARM: at91: add ram controller DT support
We can now drop the call to ioremap_registers() as we have the binding for the
SDRAM/DDR Controller.
Drop ioremap_registers() for sam9x5 too.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/at91sam9x5.c')
| -rw-r--r-- | arch/arm/mach-at91/at91sam9x5.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c index c121fe5fabbd..01b2bd816a9a 100644 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c @@ -299,11 +299,6 @@ static void __init at91sam9x5_map_io(void) at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE); } -static void __init at91sam9x5_ioremap_registers(void) -{ - at91_ioremap_ramc(0, AT91SAM9X5_BASE_DDRSDRC0, 512); -} - void __init at91sam9x5_initialize(void) { at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0); @@ -356,7 +351,6 @@ static unsigned int at91sam9x5_default_irq_priority[NR_AIC_IRQS] __initdata = { struct at91_init_soc __initdata at91sam9x5_soc = { .map_io = at91sam9x5_map_io, .default_irq_priority = at91sam9x5_default_irq_priority, - .ioremap_registers = at91sam9x5_ioremap_registers, .register_clocks = at91sam9x5_register_clocks, .init = at91sam9x5_initialize, }; |