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| author | Maxime Ripard <maxime.ripard@free-electrons.com> | 2014-07-03 14:00:52 +0400 |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2014-08-25 18:06:22 +0400 |
| commit | 99d63fa1c8fe8853540116a6deaedc1ba1fc0468 (patch) | |
| tree | 5371fbea0945f710b7215c2772c4f67eb76e7ca2 /arch/arm/mach-at91/at91sam9_alt_reset.S | |
| parent | e76265c627ca0aff6cc129486ac656b6b6dd06af (diff) | |
| download | linux-99d63fa1c8fe8853540116a6deaedc1ba1fc0468.tar.xz | |
ARM: at91: Remove reset code from the machine code
Now that the transition is over and that we probe our reset driver in every
case, we can remove the legacy code from the machine directory.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/at91sam9_alt_reset.S')
| -rw-r--r-- | arch/arm/mach-at91/at91sam9_alt_reset.S | 40 |
1 files changed, 0 insertions, 40 deletions
diff --git a/arch/arm/mach-at91/at91sam9_alt_reset.S b/arch/arm/mach-at91/at91sam9_alt_reset.S deleted file mode 100644 index f039538d3bdb..000000000000 --- a/arch/arm/mach-at91/at91sam9_alt_reset.S +++ /dev/null @@ -1,40 +0,0 @@ -/* - * reset AT91SAM9G20 as per errata - * - * (C) BitBox Ltd 2010 - * - * unless the SDRAM is cleanly shutdown before we hit the - * reset register it can be left driving the data bus and - * killing the chance of a subsequent boot from NAND - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#include <linux/linkage.h> -#include <mach/hardware.h> -#include <mach/at91_ramc.h> -#include "at91_rstc.h" - - .arm - - .globl at91sam9_alt_restart - -at91sam9_alt_restart: ldr r0, =at91_ramc_base @ preload constants - ldr r0, [r0] - ldr r4, =at91_rstc_base - ldr r1, [r4] - - mov r2, #1 - mov r3, #AT91_SDRAMC_LPCB_POWER_DOWN - ldr r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST - - .balign 32 @ align to cache line - - str r2, [r0, #AT91_SDRAMC_TR] @ disable SDRAM access - str r3, [r0, #AT91_SDRAMC_LPR] @ power down SDRAM - str r4, [r1, #AT91_RSTC_CR] @ reset processor - - b . |