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authorArnd Bergmann <arnd@arndb.de>2014-03-17 18:38:07 +0400
committerArnd Bergmann <arnd@arndb.de>2014-03-17 18:38:07 +0400
commit397d77a5669d39c6ee5d373e3a51131959fac21e (patch)
treeb417b96ca2d2a45b4ab87f1fba76a8c97ab24509 /arch/arm/mach-at91/at91sam9261.c
parent0daba17de771388a004148a357f7c63d648b0b3b (diff)
parent050208dfd0d725c307e6ad3442d9f809501091cd (diff)
downloadlinux-397d77a5669d39c6ee5d373e3a51131959fac21e.tar.xz
Merge tag 'at91-cleanup' of git://github.com/at91linux/linux-at91 into next/cleanup
Merge "First batch of AT91 cleanup for 3.15" from Nicolas Ferre: - some updates on the defconfig front - two SoCs converted to Device Tree: sam9261 and sam9rl (with use of CCF!) - a little PWM clock update that goes on top of this * tag 'at91-cleanup' of git://github.com/at91linux/linux-at91: ARM: at91: add PWM clock ARM: at91: move sam9261 SoC to common clk ARM: at91: prepare common clk transition for sam9261 SoC ARM: at91: updated the at91_dt_defconfig with support for the ADS7846 ARM: at91: dt: sam9261: Device Tree support for the at91sam9261ek ARM: at91: dt: defconfig: Added the sam9261 to the list of DT-enabled SOCs ARM: at91: dt: Add at91sam9261 dt SoC support ARM: at91: switch sam9rl to common clock framework ARM: at91/dt: define main clk frequency of at91sam9rlek ARM: at91/dt: define at91sam9rl clocks ARM: at91: prepare common clk transition for sam9rl SoCs ARM: at91: prepare sam9 dt boards transition to common clk ARM: at91: dt: sam9rl: Device Tree for the at91sam9rlek ARM: at91/defconfig: Add the sam9rl to the list of DT-enabled SOCs ARM: at91: Add at91sam9rl DT SoC support ARM: at91: prepare at91sam9rl DT transition ARM: at91/defconfig: refresh at91sam9260_9g20_defconfig ARM: at91/defconfig: remove useless configuration in at91sam9260_9g20_defconfig ARM: at91/defconfig: refresh at91sam9rl_defconfig Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-at91/at91sam9261.c')
-rw-r--r--arch/arm/mach-at91/at91sam9261.c25
1 files changed, 23 insertions, 2 deletions
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 48b51f796d6a..fb164a5d04a9 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -26,10 +26,12 @@
#include "at91_rstc.h"
#include "soc.h"
#include "generic.h"
-#include "clock.h"
#include "sam9_smc.h"
#include "pm.h"
+#if defined(CONFIG_OLD_CLK_AT91)
+#include "clock.h"
+
/* --------------------------------------------------------------------
* Clocks
* -------------------------------------------------------------------- */
@@ -190,6 +192,23 @@ static struct clk_lookup periph_clocks_lookups[] = {
CLKDEV_CON_ID("pioA", &pioA_clk),
CLKDEV_CON_ID("pioB", &pioB_clk),
CLKDEV_CON_ID("pioC", &pioC_clk),
+ /* more lookup table for DT entries */
+ CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
+ CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
+ CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
+ CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
+ CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
+ CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
+ CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
+ CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &hck0),
+ CLKDEV_CON_DEV_ID("hclk", "600000.fb", &hck1),
+ CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
+ CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
+ CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
+ CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
};
static struct clk_lookup usart_clocks_lookups[] = {
@@ -248,7 +267,9 @@ static void __init at91sam9261_register_clocks(void)
clk_register(&hck0);
clk_register(&hck1);
}
-
+#else
+#define at91sam9261_register_clocks NULL
+#endif
/* --------------------------------------------------------------------
* GPIO
* -------------------------------------------------------------------- */