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authorPranavkumar Sawargaonkar <pranavkumar@linaro.org>2014-07-31 10:53:23 +0400
committerChristoffer Dall <christoffer.dall@linaro.org>2014-08-29 13:53:26 +0400
commitf6edbbf36da3a27b298b66c7955fc84e1dcca305 (patch)
treeb139fa1469a73dd1e7082aba203d08509101ca2c /arch/arm/kvm/init.S
parent30d1e0e806e5b2fadc297ba78f2d7afd6ba309cf (diff)
downloadlinux-f6edbbf36da3a27b298b66c7955fc84e1dcca305.tar.xz
ARM/ARM64: KVM: Nuke Hyp-mode tlbs before enabling MMU
X-Gene u-boot runs in EL2 mode with MMU enabled hence we might have stale EL2 tlb enteris when we enable EL2 MMU on each host CPU. This can happen on any ARM/ARM64 board running bootloader in Hyp-mode (or EL2-mode) with MMU enabled. This patch ensures that we flush all Hyp-mode (or EL2-mode) TLBs on each host CPU before enabling Hyp-mode (or EL2-mode) MMU. Cc: <stable@vger.kernel.org> Tested-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> Signed-off-by: Anup Patel <anup.patel@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'arch/arm/kvm/init.S')
-rw-r--r--arch/arm/kvm/init.S4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/kvm/init.S b/arch/arm/kvm/init.S
index 991415d978b6..3988e72d16ff 100644
--- a/arch/arm/kvm/init.S
+++ b/arch/arm/kvm/init.S
@@ -99,6 +99,10 @@ __do_hyp_init:
mrc p15, 0, r0, c10, c2, 1
mcr p15, 4, r0, c10, c2, 1
+ @ Invalidate the stale TLBs from Bootloader
+ mcr p15, 4, r0, c8, c7, 0 @ TLBIALLH
+ dsb ish
+
@ Set the HSCTLR to:
@ - ARM/THUMB exceptions: Kernel config (Thumb-2 kernel)
@ - Endianness: Kernel config