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| author | David Woodhouse <David.Woodhouse@intel.com> | 2012-10-09 18:03:21 +0400 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2012-10-09 18:04:25 +0400 |
| commit | ffe315012510165ce82e4dd4767f0a5dba9edbf7 (patch) | |
| tree | f601cd980af9d0ced5ca9aedecef4fa0d2ca0e15 /arch/arm/include/debug/picoxcell.S | |
| parent | e2d3a35ee427aaba99b6c68a56609ce276c51270 (diff) | |
| parent | 4a8e43feeac7996b8de2d5b2823e316917493df4 (diff) | |
| download | linux-ffe315012510165ce82e4dd4767f0a5dba9edbf7.tar.xz | |
Merge tag 'disintegrate-mtd-20121009' of git://git.infradead.org/users/dhowells/linux-headers
UAPI Disintegration 2012-10-09
Conflicts:
MAINTAINERS
arch/arm/configs/bcmring_defconfig
arch/arm/mach-imx/clk-imx51-imx53.c
drivers/mtd/nand/Kconfig
drivers/mtd/nand/bcm_umi_nand.c
drivers/mtd/nand/nand_bcm_umi.h
drivers/mtd/nand/orion_nand.c
Diffstat (limited to 'arch/arm/include/debug/picoxcell.S')
| -rw-r--r-- | arch/arm/include/debug/picoxcell.S | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/include/debug/picoxcell.S b/arch/arm/include/debug/picoxcell.S new file mode 100644 index 000000000000..7419deb1b948 --- /dev/null +++ b/arch/arm/include/debug/picoxcell.S @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2011 Picochip Ltd., Jamie Iles + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit + * accesses to the 8250. + */ +#include <linux/serial_reg.h> + +#define UART_SHIFT 2 +#define PICOXCELL_UART1_BASE 0x80230000 +#define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000) + + .macro addruart, rp, rv, tmp + ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE) + ldr \rp, =PICOXCELL_UART1_BASE + .endm + + .macro senduart,rd,rx + str \rd, [\rx, #UART_TX << UART_SHIFT] + .endm + + .macro busyuart,rd,rx +1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT] + and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE + teq \rd, #UART_LSR_TEMT | UART_LSR_THRE + bne 1002b + .endm + + /* The UART's don't have any flow control IO's wired up. */ + .macro waituart,rd,rx + .endm |