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authorKirill A. Shutemov <kirill@shutemov.name>2010-05-15 12:57:06 +0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-05-15 18:03:52 +0400
commit8c0b742ca7a7d21de0ddc87eda6ef0b282e4de18 (patch)
tree282fc26ab73adf3a611ae50ff67d7abf799589d0 /arch/arm/include/asm/system.h
parent49aea0fd95495538230e19f58e217fb06ffdbfeb (diff)
downloadlinux-8c0b742ca7a7d21de0ddc87eda6ef0b282e4de18.tar.xz
ARM: 6134/1: Handle instruction cache maintenance fault properly
Between "clean D line..." and "invalidate I line" operations in v7_coherent_user_range(), the memory page may get swapped out. And the fault on "invalidate I line" could not be properly handled causing the oops. In ARMv6 "external abort on linefetch" replaced by "instruction cache maintenance fault". Let's handle it as translation fault. It fixes the issue. I'm not sure if it's reasonable to check arch version in run-time. Let's do it in compile time for now. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Siarhei Siamashka <siarhei.siamashka@nokia.com> Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include/asm/system.h')
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