diff options
| author | Len Brown <len.brown@intel.com> | 2011-03-23 09:34:54 +0300 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2011-03-23 09:34:54 +0300 |
| commit | 02e2407858fd62053bf60349c0e72cd1c7a4a60e (patch) | |
| tree | 0ebdbddc97d3abbc675916010e7771065b70c137 /arch/arm/include/asm/mach/irq.h | |
| parent | 96e1c408ea8a556c5b51e0e7d56bd2afbfbf5fe9 (diff) | |
| parent | 6447f55da90b77faec1697d499ed7986bb4f6de6 (diff) | |
| download | linux-02e2407858fd62053bf60349c0e72cd1c7a4a60e.tar.xz | |
Merge branch 'linus' into release
Conflicts:
arch/x86/kernel/acpi/sleep.c
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'arch/arm/include/asm/mach/irq.h')
| -rw-r--r-- | arch/arm/include/asm/mach/irq.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/include/asm/mach/irq.h b/arch/arm/include/asm/mach/irq.h index 22ac140edd9e..febe495d0c6e 100644 --- a/arch/arm/include/asm/mach/irq.h +++ b/arch/arm/include/asm/mach/irq.h @@ -34,4 +34,35 @@ do { \ raw_spin_unlock(&desc->lock); \ } while(0) +#ifndef __ASSEMBLY__ +/* + * Entry/exit functions for chained handlers where the primary IRQ chip + * may implement either fasteoi or level-trigger flow control. + */ +static inline void chained_irq_enter(struct irq_chip *chip, + struct irq_desc *desc) +{ + /* FastEOI controllers require no action on entry. */ + if (chip->irq_eoi) + return; + + if (chip->irq_mask_ack) { + chip->irq_mask_ack(&desc->irq_data); + } else { + chip->irq_mask(&desc->irq_data); + if (chip->irq_ack) + chip->irq_ack(&desc->irq_data); + } +} + +static inline void chained_irq_exit(struct irq_chip *chip, + struct irq_desc *desc) +{ + if (chip->irq_eoi) + chip->irq_eoi(&desc->irq_data); + else + chip->irq_unmask(&desc->irq_data); +} +#endif + #endif |