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| author | Marc Zyngier <marc.zyngier@arm.com> | 2014-01-22 14:20:09 +0400 |
|---|---|---|
| committer | Marc Zyngier <marc.zyngier@arm.com> | 2014-03-03 05:15:24 +0400 |
| commit | af20814ee927ed888288d98917a766b4179c4fe0 (patch) | |
| tree | d8b2dea94adc055c7a9fc351b94a72960ccc0cc9 /arch/arm/include/asm/kvm_asm.h | |
| parent | ac30a11e8e92a03dbe236b285c5cbae0bf563141 (diff) | |
| download | linux-af20814ee927ed888288d98917a766b4179c4fe0.tar.xz | |
ARM: KVM: add world-switch for AMAIR{0,1}
HCR.TVM traps (among other things) accesses to AMAIR0 and AMAIR1.
In order to minimise the amount of surprise a guest could generate by
trying to access these registers with caches off, add them to the
list of registers we switch/handle.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/include/asm/kvm_asm.h')
| -rw-r--r-- | arch/arm/include/asm/kvm_asm.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/include/asm/kvm_asm.h b/arch/arm/include/asm/kvm_asm.h index 661da11f76f4..53b3c4a50d5c 100644 --- a/arch/arm/include/asm/kvm_asm.h +++ b/arch/arm/include/asm/kvm_asm.h @@ -48,7 +48,9 @@ #define c13_TID_URO 26 /* Thread ID, User R/O */ #define c13_TID_PRIV 27 /* Thread ID, Privileged */ #define c14_CNTKCTL 28 /* Timer Control Register (PL1) */ -#define NR_CP15_REGS 29 /* Number of regs (incl. invalid) */ +#define c10_AMAIR0 29 /* Auxilary Memory Attribute Indirection Reg0 */ +#define c10_AMAIR1 30 /* Auxilary Memory Attribute Indirection Reg1 */ +#define NR_CP15_REGS 31 /* Number of regs (incl. invalid) */ #define ARM_EXCEPTION_RESET 0 #define ARM_EXCEPTION_UNDEFINED 1 |